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L6706TR 数据表(PDF) 6 Page - STMicroelectronics |
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L6706TR 数据表(HTML) 6 Page - STMicroelectronics |
6 / 47 page Pins description and connection diagrams L6706 6/47 Doc ID 15698 Rev 2 2 Pins description and connection diagrams Figure 3. Pins connection (top view) 2.1 Pin description 37 36 35 34 33 32 31 30 10 11 12 13 14 15 16 17 18 27 26 25 24 23 22 21 123456789 OFFSET OVPSEL OCSET OSC/FAULT SSOSC/FLIMIT OUTEN CS+ CS- INT1 BOOT UGATE PHASE PGND L6706 VCCDR N.C. INT4 N.C. LGATE 19 VID0 28 29 INT3 20 40 39 38 Table 2. Pin description N° Name Description 1DGND Digital GND. It must be connected to PGND (power ground). 2SGND All the internal references are referred to this pin. Connect it to the PCB signal ground. 3VCC Device supply voltage pin. The operative supply voltage is 12 V ±15%. Filter with 1 x 1 µF MLCC capacitor vs. SGND. 4COMP Error amplifier output. Connect with an RF - CF//CP vs. FB pin. The device cannot be disabled by pulling down this pin. 5FB Error amplifier inverting input pin. Connect with a resistor RFB vs. VSEN and with an RF - CF//CP vs. COMP pin. A current proportional to the load current is sourced from this pin in order to implement the droop effect. See “Droop function” Section for details. 6 VSEN Output voltage monitor, manages OVP/UVP protections and FB disconnection. Connect to the positive side of the load to perform remote sense. See “Layout guidelines” Section for proper layout of this connection. 7FBG Connect to the negative side of the load to perform remote sense. See “Layout guidelines” Section for proper layout of this connection. |
类似零件编号 - L6706TR |
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类似说明 - L6706TR |
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