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LSM330 数据表(PDF) 32 Page - STMicroelectronics

部件名 LSM330
功能描述  Power-down and sleep modes
Download  75 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

LSM330 数据表(HTML) 32 Page - STMicroelectronics

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Digital interfaces
LSM330
32/75
DocID023426 Rev 3
6
Digital interfaces
The registers embedded in the LSM330 may be accessed through both the I2C and SPI
serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
To select/exploit the I2C interface, the CS line must be tied high (i.e. connected to Vdd_IO).
6.1
I2C serial interface
The LSM330 I2C is a bus slave. The I2C is employed to write the data to the registers,
whose content can also be read back.
The relevant I2C terminology is provided in the table below.
There are two signals associated with the I2C bus: the Serial Clock Line (SCL) and the
Serial Data line (SDA). The latter is a bidirectional line used for sending and receiving the
data to/from the interface.
Table 9. Serial interface pin description
Pin name
Pin description
CS_A
Linear acceleration SPI enable
Linear acceleration I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)
CS_G
Angular rate SPI enable
Angular rate I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)
SCL_A/G
I2C serial clock (SCL)
SPI serial port clock (SPC)
SDA_A/G
I2C serial data (SDA)
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
SDO_A
SDO_G
I2C least significant bit of the device address (SA0)
SPI serial data output (SDO)
Table 10. Serial interface pin description
Term
Description
Transmitter
The device which sends data to the bus
Receiver
The device which receives data from the bus
Master
The device which initiates a transfer, generates clock signals and terminates a
transfer
Slave
The device addressed by the master


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