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AK5554VN 数据表(PDF) 52 Page - Asahi Kasei Microsystems |
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AK5554VN 数据表(HTML) 52 Page - Asahi Kasei Microsystems |
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52 / 68 page  [AK5554] 015099864-E-00 2016/03 - 52 - ■ LDO The voltage range of TVDD is from 1.7 V to 1.98 V or from 3.0 V to 3.6 V. Set ON/OFF of the LDO by the LDOE pin according to TVDD voltage (Table 21). The internal LDO is switched ON/OFF depending on TVDD voltage range. LDOE PDN LDO VDD18 pin Additional Voltage Range to TVDD pin L L OFF External Power Input 1.7-1.98 V 1.7-1.98 V L H OFF External Power Input 1.7-1.98 V 1.7-1.98 V H L OFF Pulled Down by 500 internally 3.0-3.6 V H H ON LDO Voltage Output 3.0-3.6 V Table 21. LDO Control [1] TVDD=1.7-1.98 V, LDO is OFF (LDOE pin = “L”) The internal LDO does not work properly when the TVDD voltage range is from 1.7 V to 1.98 V. Set the LDOE pin to “L” to switch OFF the LDO. A 1.7 V - 1.98 V is supplied from the VDD18 pin for internal logic circuits. The voltage difference between TVDD and VDD18 must be ±0.1 V or less. [2] TVDD=3.0-3.6 V, LDO is ON (LDOE pin = “H”) The internal LDO should be ON when the TVDD voltage range is from 3.0 V to 3.6 V. It will be the power supply for the internal logic circuit. The VDD18 pin will be a connection terminal for a stabilization capacitor. It is not possible to supply the power to external circuits from the VDD18 pin. ■ Reset The AK5554 must be reset upon power up or when changing the clock setting or clock frequency. It can be reset by the PDN pin and PW2-0 pins or RSTN bit and PW4-1 bits. |
类似零件编号 - AK5554VN_16 |
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类似说明 - AK5554VN_16 |
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