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LM25141 数据表(PDF) 3 Page - Texas Instruments

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部件名 LM25141
功能描述  Wide Input Range Synchronous Buck Controller
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

LM25141 数据表(HTML) 3 Page - Texas Instruments

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Thermal
Pad
1
DEMB
18
CS
2
VDDA
17
VOUT
3
AGND
16
VCCX
4
RT
15
VIN
5
DITH
14
HOL
6
OSC
13
HO
3
LM25141
www.ti.com
SNVSAU1 – MARCH 2017
Product Folder Links: LM25141
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Copyright © 2017, Texas Instruments Incorporated
5 Pin Configuration and Functions
RGE Package
24-Pin QFN With Exposed Thermal Pad
Top View
Connect Exposed Pad on bottom to AGND and PGND on the PCB.
Pin Functions
PIN
TYPE
DESCRIPTION
NO.
NAME
1
DEMB
I
Diode Emulation pin. Connect the DEMB pin to AGND to enable diode emulation. If it is
connected to VDDA the LM5141 operates in Forced PWM (FPWM) mode with continuous
conduction at light loads. The DEMB pin can also be used as a synchronization input, to
synchronize the internal oscillator to an external clock.
2
VDDA
P
Internal analog bias regulator output. Connect a capacitor from the VDDA pin to AGND.
3
AGND
G
Analog ground connection. Ground return for the internal voltage reference and analog
circuits.
4
RT
I
A resistor from the RT pin to ground shifts the oscillator frequency up or down from 2.2 MHz
(1.8 MHz to 2.53 MHz), or 440 kHz (300 kHz to 500 kHz). An analog voltage can be applied
to the RT pin (through a resistor) to shift the oscillator frequency.
5
DITH
O
A capacitor connected between the DITH pin and AGND is charged and discharged with a
20 µA current source. If Dither is enabled, the voltage on the DITH pin ramps up and down
modulating the oscillator frequency between –5% and +5% of the internal oscillator.
Connecting DITH to VDDA will disable the dithering feature. DITH is ignored if an external
synchronization clock is used.
6
OSC
I
Frequency selection pin. Connecting the OSC pin to VDDA sets the oscillator frequency to
2.2 MHz. Connecting the OSC pin to AGND sets the frequency to 440 kHz.
7
LOL
O
Low-side gate driver turn-off output.
8
LO
O
Low-side gate driver turn-on output.
9
PGND
G
Power ground connection pin for low-side NMOS gate driver.
10
VCC
P
VCC bias supply pin. Connect a capacitor from the VCC pin to PGND.
11
HB
P
High-side driver supply for bootstrap gate drive.
12
SW
Switching node of the buck regulator. Connect to the bootstrap capacitor, the source terminal
of the high-side MOSFET and the drain terminal of the low-side MOSFET.
13
HO
O
High-side gate driver turn-on output.
14
HOL
O
High-side gate driver turn-off output.


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