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AD5453 数据表(PDF) 3 Page - Analog Devices

部件名 AD5453
功能描述  8/10/12/14-Bit High Bandwidth Multiplying DACs with Serial Interface
Download  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD5453 数据表(HTML) 3 Page - Analog Devices

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–3–
REV. PrD
AD5450/AD5451/AD5452/AD5453
PRELIMINARY TECHNICAL DATA
TIMINGCHARACTERISTICS1
Parameter
VDD = 4.5 V to 5.5 V
VDD = 2.5 V to 5.5 V Units
Conditions/Comments
fSCLK
50
MHz max
Max Clock frequency
t1
20
ns min
SCLK Cycle time
t2
8
ns min
SCLK High Time
t3
8
ns min
SCLK Low Time
t4
8
ns min
SYNC falling edge to SCLK active edge setup time
t5
5
ns min
Data Setup Time
t6
4.5
ns min
Data Hold Time
t7
5
ns min
SYNC rising edge to SCLK active edge
t8
30
ns min
Minimum
SYNC high time
NOTES
1See Figures 1. Temperature range is as follows: Y Version: –40°C to +125°C. Guaranteed by design and characterisation, not subject to
production test. All input signals are specified with tr =tf = 5ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.
Specifications subject to change without notice.
(VREF = +5 V, IOUT2 = O V. All specifications TMIN to TMAX unless otherwise noted.)
t1
DB15
DB0
t2
t3
t4
t5
t6
t8
SCLK
SYNC
DIN
t7
Parameter
Min
Typ
M a x
Units
Conditions
Total Harmonic Distortion
- 8 0
d B
VREF = 3.5 V pk-pk, All 1s loaded, f = 1kHz
Digital THD, Clock = 1MHz
50kHz fOUT
75
d B
Output Noise Spectral Density
2 5
nV/
√Hz
@ 1kHz
SFDR performance (Wideband)
Update = 1MHz, VREF = 3.5V
Update = 1MHz
50kHz Fout
7 8
d B
20kHz Fout
7 8
d B
SFDR performance (NarrowBand)
Update = 1MHz, VREF = 3.5V
50kHz Fout
8 7
d B
20kHz Fout
8 7
d B
Intermodulation Distortion
7 8
d B
f1 = 20kHz, f2 = 25kHz, Update=1MHz,
VREF=3.5V
POWER
REQUIREMENTS
Power Supply Range
2 . 5
5 . 5
V
IDD
1
µ A
Logic Inputs = 0 V or
VDD
Power Supply Sensitivity
2
0.001
% / %
∆V
DD = ±5%
NOTES
1Temperature range is as follows: Y Version: –40°C to +125°C.
2Guaranteed by design and characterisation, not subject to production test.
Specifications subject to change without notice.
Figure 1. Timing Diagram.
(VDD = 2.5 V to 5.5 V, VREF = +10 V, IOUTx = O V. All specifications TMIN to TMAX unless otherwise noted. DC performance measured with
OP1177, AC performance with AD9631 unless otherwise noted.)


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