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AD9164BBCA 数据表(PDF) 1 Page - Analog Devices |
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AD9164BBCA 数据表(HTML) 1 Page - Analog Devices |
1 / 137 page 16-Bit, 12 GSPS, RF DAC and Direct Digital Synthesizer Data Sheet AD9164 Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2016–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES DAC update rate up to 12 GSPS (minimum) Direct RF synthesis at 6 GSPS (minimum) DC to 2.5 GHz in baseband mode DC to 6 GHz in 2× nonreturn-to-zero (NRZ) mode 1.5 GHz to 7.5 GHz in Mix-Mode Bypassable interpolation 2×, 3×, 4×, 6×, 8×, 12×, 16×, 24× Excellent dynamic performance APPLICATIONS Broadband communications systems DOCSIS 3.1 cable modem termination system (CMTS)/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point GENERAL DESCRIPTION The AD91641 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications. The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator. When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications. In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastruc- ture compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2× interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™ operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility. An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in an 165-ball, 8 mm × 8 mm, 0.5 mm pitch CSP_BGA package, and an 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option. PRODUCT HIGHLIGHTS 1. High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. 2. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. 3. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin. FUNCTIONAL BLOCK DIAGRAM HB 2× HB 3× JESD HB 2×, 4×, 8× INV SINC SDO SDIO SCLK CS SPI DAC CORE SERDIN0± SERDIN7± SYSREF± SYNCOUT± CLOCK DISTRIBUTION CLK± AD9164 TO JESD TO DATAPATH TX_ENABLE OUTPUT± RESET IRQ VREF ISET VREF NCO HB 2× NRZ RZ MIX Figure 1. 1 Protected by U.S. Patents 6,842,132 and 7,796,971. |
类似零件编号 - AD9164BBCA |
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类似说明 - AD9164BBCA |
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