Si80xx

8

Rev. 1.0

2. Functional Description

2.1. Theory of Operation

The Si80xx comprises a transmitter and a receiver separated by a semiconductor-based isolation barrier. The

Si80xx uses a high-frequency internal oscillator on the transmitter to modulate digital input signals across the

capacitive isolation barrier. On the receiver side, these signals are demodulated back to the corresponding digital

output signals that are galvanically isolated from the input. This simple and elegant architecture provides a robust

data path and requires no special considerations or initialization at start-up. A simplified block diagram for an

Si80xx data channel is shown in Figure 4.

Figure 4. Simplified Channel Diagram

The transmitter consists of an input stage that latches in data from up to six asynchronous channels, followed by a

serializer stage where the data is compressed into serial data packets that are then coupled across the capacitive

isolation barrier. The receiver consists of a demodulator block that converts the modulated signal back into serial

data packets that are then deserialized and latched to the output.

A

B

Input

Latch

Input

Selector

Transmitter

Serializer

Demodulator

Deserializer

Receiver

Si80xx

High

Frequency

Oscillator

Modulator/

Packet

Encoder

Output

Latch

Packet

Decoder

Clock

Recovery and

Demodulator