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TMP75C-Q1

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SBOS840 – NOVEMBER 2016

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7.3.3.4 Slave Mode Operations

The TMP75C-Q1 can operate as a slave receiver or slave transmitter.

7.3.3.4.1

Slave Receiver Mode:

The first byte transmitted by the master is the slave address, with the R/W bit low. The TMP75C-Q1 then

acknowledges reception of a valid address. The next byte transmitted by the master is the pointer register. The

TMP75C-Q1 then acknowledges reception of the pointer register byte. The next byte or bytes are written to the

register addressed by the pointer register. The TMP75C-Q1 acknowledges reception of each data byte. The

master can terminate data transfer by generating a start or stop condition.

7.3.3.4.2

Slave Transmitter Mode:

The first byte transmitted by the master is the slave address, with the R/W bit high. The slave acknowledges

reception of a valid slave address. The next byte is transmitted by the slave and is the most significant byte of

the register indicated by the pointer register. The master acknowledges reception of the data byte. The next byte

transmitted by the slave is the least significant byte. The master acknowledges reception of the data byte. The

master can terminate data transfer by generating a not-acknowledge bit on reception of any data byte, or by

generating a start or stop condition.

7.3.3.5 High-Speed (Hs) Mode

In order for the two-wire bus to operate at frequencies above 400 kHz, the master device must issue an SMBus

Hs-mode master code (00001xxx) as the first byte after a start condition to switch the bus to high-speed

operation. The TMP75C-Q1 does not acknowledge this byte, but does switch its input filters on SDA and SCL

and its output filters on SDA to operate in Hs-mode, allowing transfers at up to 3 MHz. After the Hs-mode master

code has been issued, the master transmits a two-wire slave address to initiate a data-transfer operation. The

bus continues to operate in Hs-mode until a stop condition occurs on the bus. Upon receiving the stop condition,

the TMP75C-Q1 switches the input and output filters back to fast-mode operation.

7.3.3.6 Timeout Function

The TMP75C-Q1 resets the serial interface if SCL or SDA are held low for 22 ms (typ) between a start and stop

condition. If the TMP75C-Q1 is pulled low, it releases the bus and then waits for a start condition. To avoid

activating the timeout function, it is necessary to maintain a communication speed of at least 1 kHz for the SCL

operating frequency.