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BD28412MUV-E2 数据表(PDF) 8 Page - Rohm |
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BD28412MUV-E2 数据表(HTML) 8 Page - Rohm |
8 / 44 page Datasheet Datasheet 8/40 TSZ02201-0C1C0E900620-1-2 © 2016 ROHM Co., Ltd. All rights reserved. 21.Sep.2016 Rev.003 www.rohm.com TSZ22111 • 15 • 001 BD28412MUV Top 2 Internal Layers Bottom Copper Pattern Thickness Copper Pattern Thickness Copper Pattern Thickness Footprints and Traces 70µm 74.2mm x 74.2mm 35µm 74.2mm x 74.2mm 70µm (Note 8) This thermal via connects with the copper pattern of all layers.. Use a thermal design that allows for a sufficient margin in consideration of power dissipation under actual operating conditions. This IC exposes its frame at the backside of package. Note that this part is assumed to use after providing heat dissipation treatment to improve heat dissipation efficiency. Try to occupy as wide as possible with heat dissipation pattern not only on the board surface but also the backside. Recommended Operating Conditions (Ta= -25°C to +85°C) Parameter Symbol Min Typ Max Unit Conditions Supply Voltage VIN 4.5 - 13 V VCCA, VCCP1, VCCP2 Load Impedance (Note 9) RL1 5.4 - - Ω BTL RL2 3.2 - - Ω PBTL High Level Input Voltage VIH 2.0 - 3.3 V FSEL0, FSEL1, FSEL2, MUTEX, PDX Low Level Input Voltage VIL 0 - 0.8 V FSEL0, FSEL1, FSEL2, MUTEX, PDX Low Level Output Voltage VOL - - 0.8 V ERRORX, IOL=0.5mA (Note 9) Tj<150°C |
类似零件编号 - BD28412MUV-E2 |
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类似说明 - BD28412MUV-E2 |
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