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932SQ426AGLFT 数据表(PDF) 10 Page - Integrated Device Technology

部件名 932SQ426AGLFT
功能描述  DERIVATIVE SUPPORTING SRNS PCIE CLOCKING
Download  25 Pages
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制造商  IDT [Integrated Device Technology]
网页  http://www.idt.com
标志 IDT - Integrated Device Technology

932SQ426AGLFT 数据表(HTML) 10 Page - Integrated Device Technology

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932SQ426
CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING
IDT®
CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING
10
932SQ426
REV C 022916
DC Electrical Characteristics - Differential Current Mode Outputs
TA = TCOM; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Slew rate
dV/dt
Scope averaging on
1
2.3
4
V/ns
1, 2, 3
Slew rate matching
∆dV/dt
Slew rate matching, Scope averaging on
10
20
%
1, 2, 4
Rise/Fall Time
Matching
∆Trf
Rise/fall matching, Scope averaging off
17
125
ps
1, 8, 9
Voltage High
VHigh
660
716
850
Voltage Low
VLow
-150
20
150
Max Voltage
Vmax
757
1150
1, 7
Min Voltage
Vmin
-300
-9
1, 7
Vswing
Vswing
Scope averaging off
300
1393
mV
1, 2
Crossing Voltage
(abs)
Vcross_abs
Scope averaging off
250
338
550
mV
1, 5
Crossing Voltage (var) ∆-Vcross
Scope averaging off
32
140
mV
1, 6
2 Measured from differential waveform
7 Includes overshoot and undershoot.
8 Measured from single-ended waveform
9 Measured with scope averaging off, using statistics function. Variation is difference between min and max.
1Guaranteed by design and characterization, not 100% tested in production. IREF = VDD/(3xR
R).
For RR =412Ω (1%), IREF =
2.67mA. IOH = 6 x IREF and VOH = 0.7V @ ZO= 85Ω differential impedance.
3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window
around differential 0V.
4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered
on the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage
thresholds the oscilloscope is to use for the edge rate calculations.
5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential
rising edge (i.e. Clock rising and Clock# falling).
6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of V_cross_min/max (V_cross
absolute) allowed. The intent is to limit Vcross induced modulation by setting V_cross_delta to be smaller than V_cross absolute.
Measurement on single ended signal using
absolute value. (Scope averaging off)
mV
Statistical measurement on single-ended
signal using oscilloscope math function.
(Scope averaging on)
mV


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