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CS8416-CZ 数据表(PDF) 10 Page - Cirrus Logic |
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CS8416-CZ 数据表(HTML) 10 Page - Cirrus Logic |
10 / 48 page CS8416 10 DS578PP2 2 TYPICAL CONNECTION DIAGRAMS CS8416 A seperate analog supply is only necessary in applications where RMCK is used for a jitter sensitive tast. For applications where RMCK is not used for a jitter sensitive task, connect VA+ to VD+ via a ferrite bead. Keep decoupling capacitors between VA+ and AGND. Please see section 5.1 "8:2 S/PDIF Input Multiplexer" and Appendix A for typical input configurations and recommended input circuits. * ** FILT DGND AGND ** *** For best jitter performance connect the filter ground directly to the AGND pin. SeeTable2for PLLfiltervalues. *** RXN RXP0 RXP1 RXP2 RXP3 AES3 / S/PDIF Sources Microcontroller SCL / CCLK SDA / CDOUT OMCK Clock Source RST AD1 / CDIN GPO0 RMCK Clock Control Serial Audio Input Device OLRCK OSCLK SDOUT External Interface RXP4 RXP5 RXP6 RXP7 AD0 / CS GPO1 AD2/GPO2 Rflt Cflt Crip 47K Ω 10 F µ +3.3V to +5V 0.1 F µ 1nF +3.3V Ferrite Bead +3.3V Analog Supply * VA+ VD+ VL+ * 10 F µ 0.1 F µ 1nF 0.1 F µ 1nF VL+ VL+ Figure 5. Typical Connection Diagram - Software Mode |
类似零件编号 - CS8416-CZ |
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类似说明 - CS8416-CZ |
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