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ST16C650AIP40 数据表(PDF) 8 Page - Exar Corporation |
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ST16C650AIP40 数据表(HTML) 8 Page - Exar Corporation |
8 / 53 page ST16C650A áç áç áç áç 2.90V TO 5.5V UART WITH 32-BYTE FIFO REV. 5.0.0 8 2.0 FUNCTIONAL DESCRIPTIONS 2.1 Host Data Bus Interface The host interface is 8 data bits wide with 3 address lines and control signals to execute bus read and write transactions. The 650A supports 3 type of host interfaces: Intel, Motorola and PC mode. The Intel and Motorola interfaces provide support for their respective microcontroller or processor. This facilitates the hardware design and interconnections. The Intel bus interface is selected by connecting IM# to logic 0 and SEL to logic 1. The Intel bus interconnections are shown in Figure 3. The Motorola bus is selected with the IM# input connected to logic 1 and SEL input ties to logic 1. The Motorola bus interconnections are shown in Figure 4. The special PC mode is selected when IM# and SEL are connected to logic 0. The PC mode interconnections are shown in Figure 5. T FIGURE 3. ST16C650A INTEL BUS INTERCONNECTIONS D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 IO R * IO W * R ESET D0 D1 D2 D3 D4 D5 D6 D7 IO R # IO W # A0 A1 A2 CS 2 # R ESET VC C CS 0 CS 1 AS# IO R IO W IN T IN T RCL K B A UDO UT # PC M O D E # IM # VC C GN D CS # OP 2 # OP 1 # DS R# CT S # RT S # DT R# RX TX RI# CD# |
类似零件编号 - ST16C650AIP40 |
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类似说明 - ST16C650AIP40 |
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