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MC100EPT23DTR2G 数据表(PDF) 2 Page - ON Semiconductor |
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MC100EPT23DTR2G 数据表(HTML) 2 Page - ON Semiconductor |
2 / 8 page MC100EPT23 www.onsemi.com 2 1 2 3 45 6 7 8 Q0 GND VCC Figure 1. Logic Diagram and 8-Lead Pinout D0 Q1 D1 D1 D0 LVPECL LVTTL (Top View) Table 1. PIN DESCRIPTION Pin Function Q0, Q1 LVTTL/LVCMOS Outputs D0**, D1** D0**, D1** Differential LVPECL/LVDS/CML Inputs VCC Positive Supply GND Ground EP (DFN−8 only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GND) or leave unconnected, floating open. ** Pins will default to VCC/2 when left open. Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 50 kW Internal Input Pullup Resistor 50 kW ESD Protection Human Body Model Machine Model Charged Device Model > 1500 V > 100 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg SOIC−8NB TSSOP−8 DFN−8 Level 1 Level 3 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 91 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit VCC Power Supply GND = 0 V 3.8 V VI Input Voltage GND = 0 V VI ≤ VCC 3.8 V Iout Output Current Continuous Surge 50 100 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm SOIC−8NB 190 130 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board SOIC−8NB 41 to 44 °C/W qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm TSSOP−8 185 140 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board TSSOP−8 41 to 44 °C/W qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm DFN−8 129 84 °C/W |
类似零件编号 - MC100EPT23DTR2G |
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类似说明 - MC100EPT23DTR2G |
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