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MC10EP17 数据表(PDF) 1 Page - ON Semiconductor

部件名 MC10EP17
功能描述  ECL Quad Differential Driver/Receiver
Download  11 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MC10EP17 数据表(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 9
1
Publication Order Number:
MC10EP17/D
MC10EP17, MC100EP17
3.3 V / 5 V ECL Quad
Differential Driver/Receiver
Description
The MC10/100EP17 is a 4-bit differential line receiver based on the
EP17 device. The > 3.0 GHz maximum frequency provided by the
high frequency outputs makes the device ideal for buffering of very
high speed oscillators.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The design incorporates two stages of gain, internal to the device,
making it an excellent choice for use in high bandwidth amplifier
applications.
Inputs of unused gates can be left open and will not affect the
operation of the rest of the device. All VCC and VEE pins must be
externally connected to power supply to guarantee proper operation.
The 100 Series contains temperature compensation.
Features
220 ps Typical Propagation Delay
Maximum Frequency > 3.0 GHz Typical
PECL Mode Operating Range:
VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode Operating Range:
VCC = 0 V with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at VEE
VBB Output
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
XXX
= 10 or 100
A
= Assembly Location
L,
= Assembly Lot
WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or G
= Pb-Free Package
http://onsemi.com
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information on page 8 of
this data sheet.
ORDERING INFORMATION
TSSOP−20
DT SUFFIX
CASE 948E
MARKING DIAGRAMS*
SOIC−20 WB
DW SUFFIX
CASE 751D−05
1
20
1
20
MCXXXEP17
AWLYYWWG
XXXX
EP17
ALYWG
G
1
20
QFN−20
MN SUFFIX
CASE 485E−01
MCXXX
EP17
ALYWG
G
1
20


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