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MC100E143FNG 数据表(PDF) 5 Page - ON Semiconductor

部件名 MC100E143FNG
功能描述  5V ECL 9?륛it Hold Register
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MC100E143FNG 数据表(HTML) 5 Page - ON Semiconductor

  MC100E143FNG Datasheet HTML 1Page - ON Semiconductor MC100E143FNG Datasheet HTML 2Page - ON Semiconductor MC100E143FNG Datasheet HTML 3Page - ON Semiconductor MC100E143FNG Datasheet HTML 4Page - ON Semiconductor MC100E143FNG Datasheet HTML 5Page - ON Semiconductor MC100E143FNG Datasheet HTML 6Page - ON Semiconductor MC100E143FNG Datasheet HTML 7Page - ON Semiconductor  
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MC10E143, MC100E143
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Table 8. AC CHARACTERISTICS (VCCx = 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = −5.0 V (Note 1))
Symbol
Characteristic
0°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fSHIFT
Max. Shift Frequency
700
900
700
900
700
900
MHz
tPLHt
PHL
Propagation Delay To Output
Clk
MR
600
600
800
800
1000
1000
600
600
800
800
1000
1000
600
600
800
800
1000
1000
ps
ts
Setup Time
D
SEL
50
300
−100
150
50
300
−100
150
50
300
−100
150
ps
th
Hold Time
D
SEL
300
75
100
−150
300
75
100
−150
300
75
100
−150
ps
tRR
Reset Recovery Time
900
700
900
700
900
700
ps
tPW
Minimum Pulse Width
Clk, MR
400
400
400
ps
tSKEW
Within-Device Skew (Note 2)
75
75
75
ps
tJITTER
Random Clock Jitter (RMS)
< 1
< 1
< 1
ps
Tr
tf
Rise/Fall Times
(20 - 80%)
300
525
800
300
525
800
300
525
800
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. 10 Series: VEE can vary −0.46 V / +0.06 V.
100 Series: VEE can vary −0.46 V / +0.8 V.
2. Within-device skew is defined as identical transitions on similar paths through a device.
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q
D
Zo = 50 W
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices


类似零件编号 - MC100E143FNG

制造商部件名数据表功能描述
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ON Semiconductor		 MC100E143FNG ONSEMI-MC100E143FNG Datasheet
128Kb / 8P		    5V ECL 9-Bit Hold Register
November, 2006 ??Rev. 7
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