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MC10E1652FNR2G 数据表(PDF) 4 Page - ON Semiconductor

部件名 MC10E1652FNR2G
功能描述  Dual ECL Output Comparator with Latch
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MC10E1652FNR2G 数据表(HTML) 4 Page - ON Semiconductor

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MC10E1652
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4
Figure 3. Typical Hysteresis Curve
Figure 4. Hysteresis Programming Voltage
40
30
20
10
0
-0.8
-1.0
-1.2
-1.4
-1.6
-1.8
-20 -16 -12
-8
-4 Vref
4
8
12
16
20
-0.2
-0.1
0.0
0.1
0.2
0.3
0.4
0.5
Vin, DIFFERENTIAL INPUT VOLTAGE (mV)
PROGRAMMING VOLTAGE (VOLTAGE ABOVE VEE)
HYSTERESIS
T = 0
°C
T =
85
°C
T =
25
°C
Table 5. AC CHARACTERISTICS VCC = +5.0 V ±5%; VEE = −5.2 V ±5%, VCC = 0 V (Note 6)
0°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fMAX
Maximum Toggle Frequency
TBD
> 1.0
TBD
GHz
tPLH
tPHL
Propagation Delay to Output (Note 7)
V to Q
LEN to Q
750
550
900
725
1050
900
775
550
925
750
1075
900
850
650
1025
825
1200
1000
ps
ts
Setup Time
V
450
300
450
300
550
350
ps
th
Enable Hold Time
V
−50
−250
−50
−250
−100
−250
ps
tpw
Minimum Pulse Width
LEN
400
400
400
ps
tskew
Within Device Skew (Note 8)
15
15
15
ps
tJITTER
Cycle−to−Cycle Jitter
TBD
TBD
TBD
ps
TDE
Delay Dispersion
(ECL Levels) (Notes 9 10)
(Notes 9, 11)
100
60
ps
TDL
Delay Dispersion
(TTL Levels) (Notes 12, 13)
(Notes 11, 12)
350
100
ps
VPP
Differential Input Voltage
|V1 − V2|
3.7
3.7
3.7
V
tr
tf
Rise/Fall Times
(20-80%)
225
325
475
225
325
475
250
375
500
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. Input VIL and VIH parameters vary 1:1 with VCC. Output VOH and VOL parameters vary 1:1 with GND.
7. The propagation delay is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output
signals. For propagation delay measurements the threshold level (VTHR) is centered about an 850 mV input logic swing with a slew rate of
0.75 V/NS. There is an insignificant change in the propagation delay over the input common mode range.
8. tskew is the propagation delay skew between comparator A and comparator B for a particular part under identical input conditions.
9. Refer to Figure 4 and note that the input is at 850 mV ECL levels with the input threshold range between the 20% and 80% points. The delay
is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output signals.
10.The slew rate is 0.25 V/NS for input rising edges.
11. The slew rate is 0.75 V/NS for input rising edges.
12.Refer to Figure 5 and note that the input is at 2.5 V TTL levels with the input threshold range between the 20% and 80% points. The delay
is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output signals.
13.The slew rate is 0.3 V/NS for input rising edges.


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