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ST16C552CJ68 数据表(PDF) 3 Page - Exar Corporation

部件名 ST16C552CJ68
功能描述  DUAL UART WITH 16-BYTE FIFO AND PARALLEL PRINTER PORT
Download  39 Pages
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制造商  EXAR [Exar Corporation]
网页  http://www.exar.com
标志 EXAR - Exar Corporation

ST16C552CJ68 数据表(HTML) 3 Page - Exar Corporation

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ST16C552/552A
Rev. 3.40
SYMBOL DESCRIPTION
Symbol
Pin
Signal Type
Pin Description
A0
35
I
Address-0 Select Bit - Internal registers address selection.
A1
34
I
Address-1 Select Bit - Internal registers address selection.
A2
33
I
Address-2 Select Bit - Internal registers address selection.
-ACK
68
I
Acknowledge (with internal pull-up) - General purpose input
or line printer acknowledge (active low). a logic 0 from the
printer, indicates successful data transfer to the print buffer.
-AutoFDXT
56
I/O
General purpose I/O (open drain, with internal pull-up) or
automatic line feed (open drain input with internal pull-up).
When this signal is low the printer should automatically line
feed after each line is printed.
BIDEN
1
I
Bi-Direction Enable - PD7-PD0 direction select. A logic 0
sets the parallel port for I/O Select Register Control. A logic
1 sets the parallel port for Control Register Bit-5 Control.
BUSY
66
I
Busy (with internal pull-up) - General purpose input or line
printer busy (active high). can be used as an output from the
printer to indicate printer is not ready to accept data.
CLK
4
I
Clock Input. - An external clock must be connected to this
pin to clock the baud rate generator and internal circuitry
(see Programmable Baud Rate Generator). This input is not
5V tolerant.
-CSA
32
I
Chip Select A - A logic 0 at this pin enables the serial
channel-A UART registers for CPU data transfers.
-CSB
3
I
Chip Select B - A logic 0 at this pin enables the serial
channel-B UART registers for CPU data transfers.
-CSP
38
I
Printer Port Chip Select - (active low). A logic 0 at this pin
enables the parallel printer port registers and/or PD7-PD0
for external CPU data transfers.
D0-D7
14-21
I/O
Data Bus (Bi-directional) - These pins are the eight bit, three
state data bus for transferring information to or from the
controlling CPU. D0 is the least significant bit and the first
data bit in a transmit or receive serial data stream.


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