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TSB43EB42 数据表(PDF) 6 Page - Texas Instruments |
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TSB43EB42 数据表(HTML) 6 Page - Texas Instruments |
6 / 11 page TSB43EC42 M6 External CPU or PCI Interface Async TX FIFO MPEG2 Demux MPEG2 Transport Stream from Satellite or Cable SDRAM CPU PCI or 68K Bus Graphics Controller 1394 Bus MPEG2 Transport Stream TSB43Ex4x SLLA275C – APRIL 2008 – REVISED FEBRUARY 2010 www.ti.com In a set-top box application (see Figure 2), the set-top box receives the MPEG2 transport stream from either satellite or cable sources. The MPEG2 transport stream is input to the TSB43EC42/43 HSDI port in AES encrypted format. The TSB43EC42/43 decrypts the packets received over the HSDI port, performs any PID filtering or packet insertion, encrypts the stream using M6 cipher, and transmits the stream over IEEE 1394. The set-top box also creates on screen display (OSD) graphics to transmit to the sink device. The system inputs the OSD data to the TSB43EC42/43 asynchronous transmit buffer. The TSB43EC42/43 transmits the OSD using asynchronous packets to the sink device. Figure 2. TSB43EC42/43 in STB Application 6 Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated |
类似零件编号 - TSB43EB42 |
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类似说明 - TSB43EB42 |
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