LF11201D datasheet(2/18 Pages) NSC

部件名	LF11201D

功能描述	Quad SPST JFET Analog Switches

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制造商	NSC [National Semiconductor (TI)]

网页	http://www.national.com

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

(Note 2)

Supply Voltage (V

CC−VEE)

36V

Reference Voltage

V

EE≤VR≤VCC

Logic Input Voltage

V

R−4.0V≤VIN≤VR+6.0V

Analog Voltage

V

EE≤VA≤VCC+6V;

V

A≤VEE+36V

Analog Current

|I

A|<20 mA

Power Dissipation (Note 3)

Molded DIP (N Suffix)

500 mW

Cavity DIP (D Suffix)

900 mW

Operating Temperature Range

LF11201, 2 and LF11331, 2, 3

−55˚C to +125˚C

LF13201, 2 and LF13331, 2, 3

0˚C to +70˚C

Storage Temperature

−65˚C to +150˚C

Soldering Information

N and D Package (10 sec.)

300˚C

SO Package:

Vapor Phase (60 sec.)

215˚C

Infrared (15 sec.)

220˚C

Electrical Characteristics (Note 4)

LF11331/2/3

LF13331/2/3

Symbol

Parameter

Conditions

LF11201/2

LF13201/2

Units

Min

Typ

Max

Min

Typ

Max

RON

“ON” Resistance

VA=0, ID=1mA

TA=25˚C

150

200

150

250

Ω

200

300

200

350

Ω

RON Match

“ON” Resistance Matching

TA=25˚C

5

20

10

50

Ω

VA

Analog Range

±10

±11

±10 ±11

V

IS(ON) +

Leakage Current in “ON” Condition

Switch “ON,” VS=VD=±10V

TA=25˚C

0.3

5

0.3

10

nA

ID(ON)

3

100

3

30

nA

IS(OFF)

Source Current in “OFF” Condition

Switch “OFF,” VS=+10V,

TA=25˚C

0.4

5

0.4

10

nA

VD=−10V

3

100

3

30

nA

ID(OFF)

Drain Current in “OFF” Condition

Switch “OFF,” VS=+10V,

TA=25˚C

0.1

5

0.1

10

nA

VD=−10V

3

100

3

30

nA

VINH

Logical “1” Input Voltage

2.0

V

VINL

Logical “0” Input Voltage

0.8

V

IINH

Logical “1” Input Current

VIN=5V

TA=25˚C

3.6

10

25

3.6

40

100

µA

IINL

Logical “0” Input Current

VIN=0.8

TA=25˚C

0.1

µA

11

µA

tON

Delay Time “ON”

VS=±10V, (Figure 3)TA=25˚C

500

ns

tOFF

Delay Time “OFF”

VS=±10V, (Figure 3)TA=25˚C

90

ns

tON−tOFF

Break-Before-Make

VS=±10V, (Figure 3)TA=25˚C

80

ns

CS(OFF)

Source Capacitance

Switch “OFF,” VS=±10V

TA=25˚C

4.0

pF

CD(OFF)

Drain Capacitance

Switch “OFF,” VD=±10V

TA=25˚C

3.0

pF

CS(ON) +

Active Source and Drain Capacitance

Switch “ON,” VS=VD=0V

TA=25˚C

5.0

pF

CD(ON)

ISO(OFF)

“OFF” Isolation

(

Figure 4), (Note 5)

TA=25˚C

−50

dB

CT

Crosstalk

(

Figure 4), (Note 5)

TA=25˚C

−65

dB

SR

Analog Slew Rate

(Note 6)

TA=25˚C

50

V/µs

IDIS

Disable Current

(

Figure 5), (Note 7)

TA=25˚C

0.4

1.0

0.6

1.5

mA

0.6

1.5

0.9

2.3

mA

IEE

Negative Supply Current

All Switches “OFF,” VS=±10V

TA=25˚C

3.0

5.0

4.3

7.0

mA

4.2

7.5

6.0

10.5

mA

IR

Reference Supply Current

All Switches “OFF,” VS=±10V

TA=25˚C

2.0

4.0

2.7

5.0

mA

2.8

6.0

3.8

7.5

mA

ICC

Positive Supply Current

All Switches “OFF,” VS=±10V

TA=25˚C

4.5

6.0

7.0

9.0

mA

6.3

9.0

9.8

13.5

mA

Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits.

Note 2: Refer to RETSF11201X, RETSF11331X, RETSF11332X and RETSF11333X for military specifications.

Note 3: For operating at high temperature the molded DIP products must be derated based on a +100˚C maximum junction temperature and a thermal resistance

of +150˚C/W, devices in the cavity DIP are based on a +150˚C maximum junction temperature and are derated at ±100˚C/W.

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