STK11C68-M datasheet(9/10 Pages) ETC

部件名	STK11C68-M

功能描述	CMOS NV SRAM

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制造商	ETC [List of Unclassifed Manufacturers]

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STK11C68-M

4-39

Internally,

RECALL is a two step procedure. First, the

SRAM data is cleared and second, the nonvolatile

information is transferred into the SRAM cells. The

RECALL operation in no way alters the data in the

EEPROM cells. The nonvolatile data can be recalled

an unlimited number of times.

On power-up, once VCC exceeds the VCC sense volt-

age of 4.0V, a

RECALL cycle is automatically initiated.

The voltage on the VCC pin must not drop below 4.0V

once it has risen above it in order for the

RECALL to

operate properly.

Due to this automatic

RECALL,

SRAM operation cannot commence until tRECALL after

VCC exceeds 4.0V. 4.0V is a typical, characterized

value.

If the STK11C68-M is in a WRITE state at the end of

power-up

RECALL, the SRAM data will be corrupted.

To help avoid this situation, a 10K Ohm resistor should

be connected between W and system VCC.

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