数据搜索系统,热门电子元器件搜索 |
|
TDA6501TT 数据表(PDF) 4 Page - NXP Semiconductors |
|
TDA6501TT 数据表(HTML) 4 Page - NXP Semiconductors |
4 / 40 page 2003 Jun 05 4 Philips Semiconductors Product specification 5 V mixer/oscillator and synthesizer for PAL and NTSC standards TDA6500TT; TDA6501TT 3 GENERAL DESCRIPTION TDA6500TT and TDA6501TT are programmable 2-mixer, 3-oscillator and synthesizer MOPLL intended for pure 3-band tuner concepts (see Fig.1). The device includes two double balanced mixers for the low and mid/high bands and three oscillators for the low, mid and high bands respectively. The band limits for PAL tuners are shown in Table 1. Other functions are an IF amplifier, a wide-band AGC detector and a PLL synthesizer. Two pins are available between the mixer output and the IF amplifier input to enable IF filtering for improved signal handling. Table 1 Low, mid and high band limits Bit P0 enables Port P0 and the low band mixer and oscillator. Bit P1 enables Port P1, the mid/high band mixer and the mid band oscillator. Bit P2 enables Port P2 and bit P3 enables Port P3. When P0 and P1 are disabled, the mid/high band mixer and the high band oscillator are enabled. The AGC detector provides information about the IF amplifier level. Five AGC take-over points are available by software. Two programmable AGC time constants are available for search tuning and normal tuner operation. The synthesizer consists of a 15-bit programmable divider, a crystal oscillator and its programmable reference divider and a phase/frequency detector combined with a charge pump, which drives the tuning amplifier including 33 V output. Depending on the reference divider ratio (64, 80 or 128) the phase comparator operates at 62.50 kHz, 50.00 kHz or 31.25 kHz with a 4 MHz crystal. The device can be controlled according to the I2C-bus format. The lock detector bit FL is set to logic 1 when the loop is locked. The AGC bit is set to logic 1 when the internal AGC is active (level below 3 V). These two flags are read on the SDA line (status byte) during a read operation (see Table 8). The ADC input is available on pin P6/ADC for digital AFC control. The ADC code is read during a read operation (see Table 8). In test mode, pin P6/ADC is used as a test output for 1 ⁄2fref and 1⁄2fdiv (see Table 5). A minimum of seven bytes, including address byte, is required to address the device, select the VCO frequency, program the ports, set the charge pump current, set the reference divider ratio, select the AGC take-over point and select the AGC time constant. The device has four independent I2C-bus addresses which can be selected by applying a specific voltage on input AS (see Table 4). BAND RFpix INPUT (MHz) OSCILLATOR (MHz) MIN. MAX. MIN. MAX. Low 45.25 154.25 84.15 193.15 Mid 161.25 439.25 200.15 478.15 High 455.25 855.25 494.15 894.15 4 ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TDA6500TT TSSOP32 plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm SOT487-1 TDA6501TT |
类似零件编号 - TDA6501TT |
|
类似说明 - TDA6501TT |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |