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LM4931 数据表(PDF) 3 Page - Texas Instruments

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部件名 LM4931
功能描述  Audio Power Amplifier Series Audio Subsystem with Mono High Efficiency Loudspeaker and Stereo Headphone Amplifiers
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

LM4931 数据表(HTML) 3 Page - Texas Instruments

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LM4931
www.ti.com
SNAS251E – APRIL 2004 – REVISED MAY 2013
PIN DESCRIPTIONS
PIN
PIN NAME
D/A
I/O
DESCRIPTION
A1
MIC_P
A
I
Microphone positive differential input
A2
MIC_N
A
I
Microphone negative differential input
A3
VDD(MIC)
A
I
Analog Vdd for microphone section
A4
MODE
D
I
Selects between SPI and I2C control interfaces (I2C = 0, SPI = 1)
A5
SDA/SDI
D
I/O
I2C_SDA or SPI_SDI depending on the MODE control
A6
NC
N/A
N/A
No Connect
B1
MIC_P
A
I
Microphone positive differential input
B2
MIC_BIAS
A
O
2V ultra clean power supply for microphones
B3
BYPASS
A
I
Click and Pop / VDD/2 reference filter
B4
ADDR/ENB
D
I
I2C_ADDR or SPI_ENB depending on the MODE control
B5
SCL/SCK
D
I
I2C_SCL or SPI_SCK depending on the MODE control
B6
PCM_SDI
D
I
PCM_SDI voice data input
C1
VSS(MIC)
A
I
Analog Vss for microphone section
C2
MIC_REF
A
I
Filter for microphone power supply
C3
NC
N/A
N/A
No Connect
C4
PCM_SDO
D
O
PCM_SDO serial data output
C5
PCM_SYNC
D
I/O
PCM_SYNC pulse for the PCM bus
C6
PCM-CLK
D
I/O
PCM_SYNC pulse for the PCM bus
D1
HPL
A
O
Left Headphone output
D2
VSS(HP)
A
I
Analog Vss for Headphone and Mixer sections
D3
VSS(HP)
A
I
Analog Vss for Headphone and Mixer sections
D4
I2S_SDI
D
I
I2S serial data input
D5
I2S_CLK
D
I/O
I2S clock signal
D6
VSSD
D
I
Digital Vss
E1
VDD(HP)
A
I
Analog Vdd for Headphone and Mixer sections
E2
HPR
A
O
Right Headphone output
E3
GPIO
D
O
Configurable multi purpose output
E4
I2S_WS
D
I/O
I2S word select signal
E5
MCLK
D
I
Input clock from 10MHz - 24.576MHz
E6
VDDD
D
I
Digital Vdd
F1
LS+
A
O
Loudspeaker positive output
F2
VDD(LS)
A
I
Analog Vdd for Loudspeaker section
F3
HP_SENSE
A
I
Input for headphone connection sense circuit
F4
NC
N/A
N/A
No Connect
F5
PLL_OUT
D
O
PLL filter output
F6
VDD(PLL)
D
I
Digital Vdd for PLL section
G1
LS+
A
O
Loudspeaker positive output
G2
VSS(LS)
A
I
Analog Vss for Loudspeaker section
G3
LS-
A
O
Loudspeaker negative output
G4
VSS(PLL)
D
I
Digital Vss for PLL section
G5
PLL_IN
D
I
PLL filter input
G6
VDD(PLL)
D
I
Digital Vdd for PLL section
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Copyright © 2004–2013, Texas Instruments Incorporated
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