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SN74ALS136N 数据表(PDF) 1 Page - Texas Instruments |
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SN74ALS136N 数据表(HTML) 1 Page - Texas Instruments |
1 / 5 page SN54ALS136, SN54AS136, SN74ALS136, SN74AS136 QUADRUPLE 2INPUT EXCLUSIVEOR GATES WITH OPENCOLLECTOR OUTPUTS SDAS162 − MARCH 1984−REVISED OCTOBER 1988 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Copyright 1991, Texas Instruments Incorporated 1 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • Package Options include Plastic “Small Outline” Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs • Dependable Texas Instruments Quality and Reliability description These devices contain four independent Exclusive-OR gates with open-collector outputs. They perform the Boolean functions Y = A ⊕ B = AB + AB in positive logic. A common application is a true/complement element. If one of the inputs is low, the other input will be reproduced in true form at the output. If one of the inputs is high, the signal on the other input will be reproduced inverted at the output. The SN54ALS136 and SN54AS136 are charac- terized for operation over the full military temperature range of −55 °C to 125°C. The SN74ALS136 and SN74AS136 are characterized for operation from 0 °C to 70°C. logic symbol† 11 =1 8 6 3 4B 3B 2B 1B 4A 3A 2A 1A 4Y 3Y 2Y 1Y 1 2 4 5 9 10 12 13 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for D, J, and N packages. SN54ALS136, SN54AS136 ...J PACKAGE SN74ALS136, SN74AS136 ...D OR N PACKAGE (TOP VIEW) SN54ALS136, SN54AS136 . . . FK PACKAGE (TOP VIEW) NC − No internal connection FUNCTION TABLE (each gate) OUTPUT INPUTS AB Y LL L L L L H H HH H H 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1B 1Y 2A 2B 2Y GND VCC 4B 4A 4Y 3B 3A 3Y 32 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 4A NC 4Y NC 3B 1Y NC 2A NC 2B |
类似零件编号 - SN74ALS136N |
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类似说明 - SN74ALS136N |
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