SN54ABT833, SN74ABT833

8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

SCBS195C – FEBRUARY 1991 – REVISED JANUARY 1997

7

POST OFFICE BOX 655303

timing requirements over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Figure 1)

VCC = 5 V,

TA = 25°C

SN54ABT833

SN74ABT833

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

t

Pulse duration

CLK high or low

3

3

3

ns

tw

Pulse duration

CLR low

3

3

3

ns

B or PARITY high

9.8

9.8

9.8

tsu

Setup time before CLK

↑

B or PARITY low

8.1

8.1

8.1

ns

CLR

2

2

2

th

Hold time after CLK

↑

B or PARITY

0

0

0

ns

switching characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Figure 1)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 5 V,

TA = 25°C

SN54ABT833

SN74ABT833

UNIT

(INPUT)

(OUTPUT)

MIN

TYP†

MAX

MIN

MAX

MIN

MAX

tPLH

AorB

BorA

1.2

2.8

4.8

1.2

5.4

1.2

5.3

ns

tPHL

A or B

B or A

1

3

4.8‡

1

5.4

1

5.3‡

ns

tPLH

A

PARITY

2.1

5.5

9.5

2.1

11.3

2.1

11.2

ns

tPHL

A

PARITY

2.5

5.3

9.7

2.5

11.1

2.5

11

ns

tPZH

OE

PARITY

2.6

6.2

8.5

2.6

10.6

2.6

10.5

ns

tPZL

OE

PARITY

2.6‡

5.8

8.6

2.6‡

10.1

2.6‡

10

ns

tPLH

CLR

ERR

1

3.2

4.8‡

1

5.3

1

5.2

ns

tPHL

CLK

ERR

1.2‡

2.8

5.7

1.2‡

6.3

1.2‡

6.2

ns

tPZH

OE

A B or PARITY

1

3.7

5.8‡

1

6.6

1

6.5‡

ns

tPZL

OE

A, B, or PARITY

1.3‡

3.8

5.8

1.3‡

6.6

1.3‡

6.5‡

ns

tPHZ

OE

A B or PARITY

1.9‡

4.4

7.3

1.9‡

8

1.9‡

7.9

ns

tPLZ

OE

A, B, or PARITY

2.2‡

4.4

7.7

2.2‡

8.2

2.2‡

8.1

ns

† All typical values are at VCC = 5 V.

‡ These limits may vary among suppliers.

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.