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ADC101S101 数据表(PDF) 2 Page - National Semiconductor (TI) |
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ADC101S101 数据表(HTML) 2 Page - National Semiconductor (TI) |
2 / 23 page Ordering Information Order Code Temperature Range Description Top Mark ADC121S101CIMF −40˚C to +125˚C 6-Lead SOT-23 Package X01C ADC101S101CIMF −40˚C to +85˚C 6-Lead SOT-23 Package X02C ADC081S101CIMF −40˚C to +85˚C 6-Lead SOT-23 Package X03C ADC121S101CIMFX −40˚C to +125˚C 6-Lead SOT-23 Package, Tape & Reel X01C ADC101S101CIMFX −40˚C to +85˚C 6-Lead SOT-23 Package, Tape & Reel X02C ADC081S101CIMFX −40˚C to +85˚C 6-Lead SOT-23 Package, Tape & Reel X03C ADC081S101CISDX −40˚C to +85˚C 6-Lead LLP Package, Tape & Reel X3C ADC081S101CISD −40˚C to +85˚C 6-Lead LLP Package, Tape & Partial Reel X3C ADC121S101EVAL SOT-23 Evaluation Board ADC101S101EVAL SOT-23 Evaluation Board ADC081S101EVAL SOT-23 Evaluation Board Pin Descriptions Pin No. Symbol Description ANALOG I/O 3V IN Analog input. This signal can range from 0V to V DD. DIGITAL I/O 4 SCLK Digital clock input. The range of frequencies for this input is 10 kHz to 20 MHz, with guaranteed performance at 20 MHz. This clock directly controls the conversion and readout processes. 5 SDATA Digital data output. The output words are clocked out of this pin by the SCLK pin. 6CS Chip select. A conversion process begins on the falling edge of CS. POWER SUPPLY 1V DD Positive supply pin. These pins should be connected to a quiet +2.7V to +5.25V source and bypassed to GND with 0.1 µF and 1 µF monolithic capacitors located within 1 cm of the power pin. The ADC121S101/101S101/081S101 uses this power supply as a reference, so it should be thoroughly bypassed. 2 GND The ground return for the supply. Block Diagram 20110218 www.national.com 2 |
类似零件编号 - ADC101S101 |
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类似说明 - ADC101S101 |
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