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AD9882KST-140 数据表(PDF) 9 Page - Analog Devices |
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AD9882KST-140 数据表(HTML) 9 Page - Analog Devices |
9 / 36 page REV. A AD9882 –9– PIN DESCRIPTIONS OF SHARED PINS BETWEEN ANALOG AND DIGITAL INTERFACES HSOUT Horizontal Sync Output A reconstructed and phase-aligned version of the video Hsync. The polarity of this output can be controlled via a serial bus bit. In analog interface mode, the placement and duration are variable. In digital interface mode, the placement and duration are set by the graphics transmitter. VSOUT Vertical Sync Output The separated Vsync from a composite signal or a direct pass-through of the Vsync input. The polarity of this output can be controlled via a serial bus bit. The placement and duration in all modes is set by the graphics transmitter. SERIAL PORT (2-WIRE) SDA Serial Port Data I/O SCL Serial Port Data Clock A0 Serial Port Address Input For a full description of the 2-wire serial register, refer to the Control Port section on 2-Wire Serial Control. DATA OUTPUTS RED Data Output, RED Channel GREEN Data Output, GREEN Channel BLUE Data Output, BLUE Channel The main data outputs. Bit 7 is the MSB. These outputs are shared between the two interfaces and behave according to which interface is active. Refer to the sections on the two interfaces for more information on how these outputs behave. DATACK Data Output Clock Just like the data outputs, the data clock output is shared between the two interfaces. It behaves differently depending on which interface is active. Refer to the sections on the two interfaces to determine how this pin behaves. Table II. Analog Interface Pin List Pin Pin Type Mnemonic Function Value Number Analog Video RAIN Analog Input for Converter R 0.0 V to 1.0 V 70 Inputs GAIN Analog Input for Converter G 0.0 V to 1.0 V 65 BAIN Analog Input for Converter B 0.0 V to 1.0 V 59 External HSYNC Horizontal SYNC Input 3.3 V CMOS 79 Sync/Clock VSYNC Vertical SYNC Input 3.3 V CMOS 80 SOGIN Sync-on-Green Input 0.0 V to 1.0 V 64 Sync Outputs HSOUT Hsync Output (Phase-Aligned with DATACK) 3.3 V CMOS 88 VSOUT Vsync Output 3.3 V CMOS 87 SOGOUT Composite SYNC 3.3 V CMOS 89 Voltage REFBYPASS Internal Reference Bypass 1.25 V 73 Reference MIDBYPASS Internal Midscale Voltage Bypass 74 Clamp Voltages PLL Filter FILT Connection for External Filter Components for Internal PLL 48 Power Supply VD Main Power Supply 3.15 V to 3.45 V PVD PLL Power Supply (Nominally 3.3 V) 3.15 V to 3.45 V VDD Output Power Supply 2.2 V to 3.6 V GND Ground 0 V |
类似零件编号 - AD9882KST-140 |
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类似说明 - AD9882KST-140 |
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