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AD7475 数据表(PDF) 7 Page - Analog Devices

部件名 AD7475
功能描述  1 MSPS, 12-Bit ADCs
Download  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7475 数据表(HTML) 7 Page - Analog Devices

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REV. A
AD7475/AD7495
–7–
PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
REF IN
Reference Input for the AD7475. An external reference must be applied to this input. The voltage range
for the external reference is 2.5 V
±1% for specified performance. A cap of a least 0.1 F should be placed
on the REF IN pin.
REF OUT
Reference Output for the AD7495. A minimum 100 nF capacitance is required from this pin to GND. The
internal reference can be taken from this pin but buffering is required before it is applied elsewhere in a system.
2VIN
Analog Input. Single-ended analog input channel. The input range is 0 to REF IN.
3
GND
Analog Ground. Ground reference point for all circuitry on the AD7475/AD7495. All analog input signals
and any external reference signal should be referred to this GND voltage.
4
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is
also used as the clock source for the AD7475/AD7495’s conversion process.
5
SDATA
Data Out. Logic Output. The conversion result from the AD7475/AD7495 is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream consists
of four leading zeros followed by the 12 bits of conversion data which is provided MSB first.
6VDRIVE
Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the serial interface
of the AD7475/AD7495 will operate.
7
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the
AD7475/AD7495 and also frames the serial data transfer.
8VDD
Power Supply Input. The VDD range for the AD7475/AD7495 is from 2.7 V to 5.25 V.
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing through
the endpoints of the ADC transfer function. The endpoints of the
transfer function are zero scale, a point 1/2 LSB below the first
code transition, and full scale, a point 1/2 LSB above the last
code transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00 . . . 000) to
(00 . . . 001) from the ideal, i.e., AGND + 0.5 LSB.
Gain Error
This is the deviation of the last code transition (111 . . . 110) to
(111 . . . 111) from the ideal (i.e., VREF – 1.5 LSB) after the offset
error has been adjusted out.
Track/Hold Acquisition Time
The track/hold amplifier returns into track mode on the 13th
SCLK rising edge (see Serial Interface section). The Track/Hold
Acquisition Time is the minimum time required for the track-
and-hold amplifier to remain in track mode for its output to
reach and settle to within 0.5 LSB of the applied input signal,
given a step change to the input signal.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the sum of all nonfundamental signals
up to half the sampling frequency (fS/2), excluding dc. The ratio
is dependent on the number of quantization levels in the digiti-
zation process; the more levels, the smaller the quantization noise.
The theoretical signal to (noise + distortion) ratio for an ideal
N-bit converter with a sine wave input is given by:
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
Thus for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7475/AD7495, it is
defined as:
THD dB
VVVVV
V
(
)
log
=
++++
20
2
2
3
2
4
2
5
2
6
2
1
where V1 is the rms amplitude of the fundamental and V2, V3, V4,
V5 and V6 are the rms amplitudes of the second through the sixth
harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the rms
value of the next largest component in the ADC output spectrum
(up to fS/2 and excluding dc) to the rms value of the fundamental.
Normally, the value of this specification is determined by the
largest harmonic in the spectrum, but for ADCs where the har-
monics are buried in the noise floor, it will be a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation distortion terms are those
for which neither m nor n is equal to zero. For example, the
second order terms include (fa + fb) and (fa – fb), while the third
order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb).
The AD7475/AD7495 are tested using the CCIF standard where
two input frequencies near the top end of the input bandwidth are
used. In this case, the second order terms are usually distanced
in frequency from the original sine waves while the third order
terms are usually at a frequency close to the input frequencies.
As a result, the second and third order terms are specified sepa-
rately. The calculation of the intermodulation distortion is as per
the THD specification where it is the ratio of the rms sum of the
individual distortion products to the rms amplitude of the sum
of the fundamentals expressed in dBs.


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