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CDCE937-Q1 数据表(PDF) 4 Page - Texas Instruments

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部件名 CDCE937-Q1
功能描述  PROGRAMMABLE 3-PLL VCXO CLOCK SYNTHESIZER
Download  30 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

CDCE937-Q1 数据表(HTML) 4 Page - Texas Instruments

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CDCE937-Q1
CDCEL937-Q1
SCAS892B – FEBRUARY 2010 – REVISED MAY 2010
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
VDD
Supply voltage range
–0.5 to 2.5
V
VI
Input voltage range(2) (3)
–0.5 to VDD + 0.5
V
VO
Output voltage range(2)
–0.5 to Vddout + 0.5
V
II
Input current (VI < 0, VI > VDD)
20
mA
IO
Continuous output current
50
mA
Tstg
Storage temperature range
–65 to 150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3)
SDA and SCL can go up to 3.6 V as stated in the Recommended Operating Conditions table.
PACKAGE THERMAL RESISTANCE
(1)
over operating free-air temperature range (unless otherwise noted)
AIRFLOW
PARAMETER
°C/W
(lfm)
0
89
150
75
TJA
Thermal resistance, junction to ambient
200
74
250
74
500
69
TJC
Thermal resistance, junction to case
31
TJB
Thermal resistance, junction to board
55
RqJT
Thermal resistance, junction to top
0.8
RqJB
Thermal resistance, junction to bottom
49
(1)
The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board).
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
VDD
Device supply voltage
1.7
1.8
1.9
V
Output Yx supply voltage, Vddout
CDCE937
2.3
3.6
V
VO
CDCEL937
1.7
1.9
VIL
Low-level input voltage LVCMOS
0.3 VDD
V
VIH
High-level input voltage LVCMOS
0.7 VDD
V
VI(thresh)
Input voltage threshold LVCMOS
0.5 VDD
V
Input voltage range S0
0
1.9
VIS
V
Input voltage range S1, S2, SDA, SCL; VI(thresh) = 0.5 VDD
0
3.6
VI(CLK)
Input voltage range CLK
0
1.9
V
Output current (Vddout = 3.3 V)
±12
IOH /IOL
Output current (Vddout = 2.5 V)
±10
mA
Output current (Vddout = 1.8 V)
±8
CL
Output load LVCMOS
10
pF
TA
Ambient temperature
–40
125
°C
4
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): CDCE937-Q1


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