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AM5728BABCXA 数据表(PDF) 4 Page - Texas Instruments

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部件名 AM5728BABCXA
功能描述  AM572x Sitara??Processors
Download  415 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

AM5728BABCXA 数据表(HTML) 4 Page - Texas Instruments

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AM5728, AM5726
SPRS953A – DECEMBER 2015 – REVISED JUNE 2016
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM5728 AM5726
Table of Contents
Copyright © 2015–2016, Texas Instruments Incorporated
Table of Contents
1
Device Overview
......................................... 1
1.1
Features
.............................................. 1
1.2
Applications
........................................... 1
1.3
Description
............................................ 2
1.4
Functional Block Diagram
........................... 3
2
Revision History
......................................... 5
3
Device Comparison
..................................... 6
3.1
Device Comparison Table
............................ 6
3.2
Related Products
..................................... 8
4
Terminal Configuration and Functions
.............. 9
4.1
Terminal Assignment
................................. 9
4.2
Ball Characteristics
.................................. 10
4.3
Multiplexing Characteristics
......................... 90
4.4
Signal Descriptions
................................ 110
5
Specifications
......................................... 158
5.1
Absolute Maximum Ratings
........................ 158
5.2
ESD Ratings
....................................... 159
5.3
Power on Hours (POH) Limits
..................... 159
5.4
Recommended Operating Conditions
............. 161
5.5
Operating Performance Points
..................... 164
5.6
Power Consumption Summary
.................... 182
5.7
Electrical Characteristics
........................... 182
5.8
Thermal Characteristics
............................ 190
5.9
Power Supply Sequences
......................... 192
6
Clock Specifications
................................. 197
6.1
Input Clock Specifications
......................... 198
6.2
DPLLs, DLLs Specifications
....................... 206
7
Timing Requirements and Switching
Characteristics
........................................ 211
7.1
Timing Test Conditions
............................ 211
7.2
Interface Clock Specifications
..................... 211
7.3
Timing Parameters and Information
............... 211
7.4
Recommended Clock and Control Signal Transition
Behavior
............................................ 213
7.5
Virtual and Manual I/O Timing Modes
............. 213
7.6
Video Input Ports (VIP)
............................ 216
7.7
Display Subsystem – Video Output Ports
......... 234
7.8
Display Subsystem – High-Definition Multimedia
Interface (HDMI)
................................... 245
7.9
External Memory Interface (EMIF)
................. 245
7.10
General-Purpose Memory Controller (GPMC)
..... 245
7.11
Timers
.............................................. 267
7.12
Inter-Integrated Circuit Interface (I2C)
............. 268
7.13
HDQ / 1-Wire Interface (HDQ1W)
................. 271
7.14
Universal Asynchronous Receiver Transmitter
(UART)
............................................. 273
7.15
Multichannel Serial Peripheral Interface (MCSPI)
. 274
7.16
Quad Serial Peripheral Interface (QSPI)
.......... 280
7.17
Multichannel Audio Serial Port (McASP)
.......... 286
7.18
Universal Serial Bus (USB)
........................ 306
7.19
Serial Advanced Technology Attachment (SATA)
. 306
7.20
Peripheral Component Interconnect Express
(PCIe)
.............................................. 306
7.21
Controller Area Network Interface (DCAN)
........ 307
7.22
Ethernet Interface (GMAC_SW)
................... 308
7.23
eMMC/SD/SDIO
................................... 319
7.24
General-Purpose Interface (GPIO)
................ 345
7.25
Programmable Real-Time Unit Subsystem and
Industrial Communication Subsystem (PRU-ICSS) 346
7.26
System and Miscellaneous interfaces
............. 372
7.27
Test Interfaces
..................................... 372
8
Applications, Implementation, and Layout
...... 377
8.1
Power Supply Mapping
............................ 377
8.2
DDR3 Board Design and Layout Guidelines
....... 378
8.3
High Speed Differential Signal Routing Guidance
. 401
8.4
Power Distribution Network Implementation
Guidance
........................................... 401
8.5
Single-Ended Interfaces
........................... 401
8.6
Clock Routing Guidelines
.......................... 403
9
Device and Documentation Support
.............. 406
9.1
Device Nomenclature
.............................. 406
9.2
Tools and Software
................................ 408
9.3
Documentation Support
............................ 408
9.4
Receiving Notification of Documentation Updates
. 409
9.5
Related Links
...................................... 409
9.6
Community Resources
............................. 409
9.7
Trademarks
........................................ 409
9.8
Electrostatic Discharge Caution
................... 410
9.9
Glossary
............................................ 410
10
Mechanical Packaging and Orderable
Information
............................................. 411
10.1
Mechanical Data
................................... 411


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