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SN74AHCT16244DL 数据表(PDF) 5 Page - Texas Instruments |
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SN74AHCT16244DL 数据表(HTML) 5 Page - Texas Instruments |
5 / 20 page SN74AHCT16244 www.ti.com SCLS334J – MARCH 1996 – REVISED OCTOBER 2014 7 Specifications 7.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 7 V VI Input voltage range(2) –0.5 7 V VO Output voltage range(2) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 or VO > VCC ±20 mA IO Continuous output current VO = 0 to VCC ±25 mA Continuous current through VCC or GND ±75 mA (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 7.2 Handling Ratings MIN MAX UNIT Tstg Storage temperature range –65 150 °C Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all 0 2000 pins(1) V(ESD) Electrostatic discharge V Charged device model (CDM), per JEDEC specification 0 2000 JESD22-C101, all pins(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) SN74AHCT16244 UNIT MIN MAX VCC Supply voltage 4.5 5.5 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VI Input voltage 0 5.5 V VO Output voltage 0 VCC V IOH High-level output current –8 mA IOL Low-level output current 8 mA ∆t/∆v Input transition rise or fall rate 20 ns/V TA Operating free-air temperature –40 125 °C (1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004). Copyright © 1996–2014, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: SN74AHCT16244 |
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