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ADC081000 数据表(PDF) 11 Page - Texas Instruments

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部件名 ADC081000
功能描述  High Performance, Low Power 8-Bit, 1 GSPS A/D Converter
Download  41 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

ADC081000 数据表(HTML) 11 Page - Texas Instruments

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ADC081000
www.ti.com
SNAS209G – FEBRUARY 2004 – REVISED MAY 2013
CONVERTER ELECTRICAL CHARACTERISTICS (continued)
The following specifications apply after calibration for VA = VDR = +1.9VDC, OutV = 1.9V, VIN FSR (a.c. coupled) = differential
800mVP-P, CL = 10 pF, Differential, a.c. coupled Sinewave Clock, fCLK = 1 GHz at 0.5VP-P with 50% duty cycle, REXT = 3300Ω ±
0.1%, Analog Signal Source Impedance = 100
Ω. Boldface limits apply for TA = TMIN to TMAX. All other limits TA = 25°C,
unless otherwise stated
(1)(2)(3)
Units
Symbol
Parameter
Conditions
Typical(4)
Limits(4)
(Limits)
tCH
Input Clock High Time(8)
500
200
ps (min)
45
% (min)
DCLK Duty Cycle(8)
50
55
% (max)
tLHT
Differential Low to High Transition Time
10% to 90%, CL = 2.5 pF
250
ps
tHLT
Differential High to Low Transition Time
10% to 90%, CL = 2.5 pF
250
ps
50% of DCLK transition to 50% of Data
tOSK
DCLK to Data Output Skew(10)
0
±200
ps (max)
transition
tAD
Sampling (Aperture) Delay
Input CLK+ Fall to Acquisition of Data
930
ps
tAJ
Aperture Jitter
0.4
ps rms
50% of Input Clock transition to 50% of
tOD
Input Clock to Data Output Delay
2.7
ns
Data transition
"D" Outputs
7
Pipeline Delay (Latency)(10)
Clock Cycles
"Dd" Outputs
8
PD low to Rated Accuracy Conversion
tWU
500
ns
(Wake-Up Time)
tCAL
Calibration Cycle Time
46,000
Clock Cycles
(10) This parameter is specified by design and is not tested in production.
Copyright © 2004–2013, Texas Instruments Incorporated
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