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ADC08200 数据表(PDF) 5 Page - Texas Instruments |
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ADC08200 数据表(HTML) 5 Page - Texas Instruments |
5 / 27 page ADC08200 www.ti.com SNAS136M – APRIL 2001 – REVISED MARCH 2013 Converter Electrical Characteristics The following specifications apply for VA = VDR = +3.0VDC, VRT = +1.9V, VRB = 0.3V, CL = 5 pF, fCLK = 200 MHz at 50% duty cycle. Boldface limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C (1) (2) (3) Units Symbol Parameter Conditions Typical (4) Limits (4) (Limits) DC ACCURACY +1.0 +1.9 LSB (max) INL Integral Non-Linearity −0.3 −1.2 LSB (min) DNL Differential Non-Linearity ±0.4 ±0.95 LSB (max) Missing Codes 0 (max) FSE Full Scale Error 36 50 mV (max) VOFF Zero Scale Offset Error 46 60 mV (max) ANALOG INPUT AND REFERENCE CHARACTERISTICS VRB V (min) VIN Input Voltage 1.6 VRT V (max) (CLK LOW) 3 pF CIN VIN Input Capacitance VIN = 0.75V +0.5 Vrms (CLK HIGH) 4 pF RIN RIN Input Resistance >1 M Ω BW Full Power Bandwidth 500 MHz VA V (max) VRT Top Reference Voltage 1.9 0.5 V (min) VRT − 0.5 V (max) VRB Bottom Reference Voltage 0.3 0 V (min) 1.0 V (min) VRT - VRB Reference Voltage Delta 1.6 2.3 V (max) 120 Ω (min) RREF Reference Ladder Resistance VRT to VRB 160 200 Ω (max) CLK, PD DIGITAL INPUT CHARACTERISTICS VIH Logical High Input Voltage VDR = VA = 3.6V 2.0 V (min) VIL Logical Low Input Voltage VDR = VA = 2.7V 0.8 V (max) IIH Logical High Input Current VIH = VDR = VA = 3.6V 10 nA IIL Logical Low Input Current VIL = 0V, VDR = VA = 2.7V −50 nA CIN Logic Input Capacitance 3 pF (1) The Electrical characteristics tables list ensured specifications under the listed Recommended Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations for room temperature only and are not ensured. (2) The analog inputs are protected as shown below. Input voltage magnitudes up to VA + 300 mV or to 300 mV below GND will not damage this device. However, errors in the A/D conversion can occur if the input goes above VDR or below GND by more than 100 mV. For example, if VA is 2.7VDC the full-scale input voltage must be ≤2.8VDC to ensure accurate conversions. (3) To ensure accuracy, it is required that VA and VDR be well bypassed. Each supply pin must be decoupled with separate bypass capacitors. (4) Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are specifid to TI's AOQL (Average Outgoing Quality Level). Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: ADC08200 |
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类似说明 - ADC08200 |
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