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74HC2G125 数据表(PDF) 11 Page - NXP Semiconductors |
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74HC2G125 数据表(HTML) 11 Page - NXP Semiconductors |
11 / 20 page 2003 Mar 03 11 Philips Semiconductors Product specification Dual buffer/line driver; 3-state 74HC2G125; 74HCT2G125 handbook, full pagewidth MNA362 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH nOE input VI VOL VOH VCC VM GND GND tPZL tPZH VM VM Fig.6 The 3-state enable and disable times. For 74HC2G125: VM = 50%; VI = GND to VCC. For 74HCT2G125: VM = 1.3 V; VI = GND to 3.0 V. handbook, full pagewidth open GND VCC VCC VI VO MNA232 D.U.T. CL RT RL = 1000 Ω PULSE GENERATOR S1 Fig.7 Load circuitry for switching times. Definitions for test circuit: CL = load capacitance including jig and probe capacitance (see “AC characteristics”). RL = Load resistance. RT = termination resistance should be equal to the output impedance Zo of the pulse generator. TEST S1 tPLH/tPHL open tPLZ/tPZL VCC tPHZ/tPZH GND |
类似零件编号 - 74HC2G125 |
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类似说明 - 74HC2G125 |
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