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DAC1231LCJ 数据表(PDF) 8 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 DAC1231LCJ
功能描述  12-Bit, uP Compatible, Double-Buffered D to A Converters
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

DAC1231LCJ 数据表(HTML) 8 Page - National Semiconductor (TI)

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Application Hints (Continued)
14 Left-Justified Data Format
It is important to realize that the input registers of these
DACs are arranged to accept a left-justified data word from
the microprocessor with the most significant 8 bits coming
first (Byte 1) and the lower 4 bits second Left justification
simply means that the binary point is assumed to be located
to the left of the most significant bit
Figure 3 shows how the
12 bits of DAC data should be arranged in 2 8-bit registers
of an 8-bit processor before being written to the DAC
TLH5690-10
X e don’t care
FIGURE 3 Left-Justified Data Format
15 16-Bit Data Bus Interface
The DAC1208 series provides all 12 digital input lines to
permit a direct parallel interface to a 16-bit data bus In this
instance double buffering is not always necessary (unless a
simultaneous updating of several DACs or a data transfer
via an external strobe is desired) so the 12-bit DAC register
can be wired to flow-through whereby its Q outputs always
reflect the state of its D inputs The external connections
required and the timing diagram for this single buffered ap-
plication are shown in
Figure 4 Note that either left or right-
justified data from the processor can be accommodated
with a 16-bit data bus
16 Flow-Through Operation
Through primarily designed to provide microprocessor inter-
face compatibility the MICRO-DACs can easily be config-
ured to allow the analog output to continuously reflect the
state of an applied digital input This is most useful in appli-
Interface Timing
TLH5690-11
XFER and WR2 grounded Byte 1Byte 2 tied to VCC
FIGURE 4 16-Bit Data Bus Interface for the DAC1208 Series
8


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