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DAC1020LCN 数据表(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 DAC1020LCN
功能描述  10-Bit, 12-Bit Binary Multiplying D/A Converter
Download  14 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

DAC1020LCN 数据表(HTML) 4 Page - National Semiconductor (TI)

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Typical Applications
The following applications are also valid for 12-bit systems
using the DAC1220 and 2 additional digital inputs
Operational Amplifier Bias Current
(
Figure 3 )
The op amp bias current Ib flows through the 15k internal
feedback resistor BI-FET op amps have low Ib and there-
fore the 15k c Ib error they introduce is negligible they are
strongly recommended for the DAC1020 applications
VOS Considerations
The output impedance ROUT of the DAC is modulated by
the digital input code which causes a modulation of the op-
erational amplifier output offset It is therefore recommend-
ed to adjust the op amp VOS ROUT is E15k if more than 4
digital inputs are high ROUT is E45k if a single digital input
is high and ROUT approaches infinity if all inputs are low
Operational Amplifier VOS Adjust (Figure 3 )
Connect all digital inputs A1 – A10 to ground and adjust the
potentiometer to bring the op amp VOUT pin to within g1
mV from ground potential If VREF is less than 10V a finer
VOS adjustment is required It is helpful to increase the reso-
lution of the VOS adjust procedure by connectinga1kX
resistor between the inverting input of the op amp to
ground After VOS has been adjusted remove the 1 kX
Full-Scale Adjust
(
Figure 4 )
Switch high all the digital inputs A1 – A10 and measure the
op amp output voltage Use a 500X potentiometer as
shown to bring
llVOUTll to a voltage equal to VREF c
10231024
SELECTING AND COMPENSATING THE OPERATIONAL AMPLIFIER
Op Amp Family
CF
Ri
PVW
Circuit Settling
Circuit Small
Time ts
Signal BW
LF357
10 pF
24k
25k
Va
15 ms1M
LF356
22 pF
%
25k
Va
3 ms
05M
LF351
24 pF
%
10k
Vb
4 ms
05M
LM741
0
%
10k
Vb
40 ms
200 kHz
TLH5689 – 3
VOUT ebVREF
A12aA24aA38a  A10
1024
J
b
10V s VREF s 10V
0 s VOUT s b
1023
1024
VREF
where AN e 1 if the AN digital input is high
AN e 0 if the AN digital input is low
FIGURE 3 Basic Connection Unipolar or 2-Quadrant Multiplying
Configuration (Digital Attenuator)
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4


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