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SL486NAMP 数据表(PDF) 4 Page - List of Unclassifed Manufacturers |
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SL486NAMP 数据表(HTML) 4 Page - List of Unclassifed Manufacturers |
4 / 7 page 3 SL486 inverse to that of the output on pin 9 so must be re-inverted for microprocessor applications. Regulator Input, VREGIN (Pin 12) The device can be operated with supplies of between 4·5V and 9·0V connected between input/output ground (pins 14 and 13) and input and output VCC (pins 4 and 7) as shown in Fig. 3. The device can also be operated with supplies in excess of 9·0V by using the on-chip regulator. In this case connections are made between VCCO (pin 7) and the regulator input VREGIN(pin 12) as shown in Fig. 4. A supply voltage of between 9·0V and 18V will then cause VEEO (pin 13) to be regulated at a level nominally 6·4V below VCCO(pin 7). The regulator will, however, lose control with a potential difference of less than 9·0V. Below this level the voltage on pin 13 will track nominally 1·5V above the level of pin 12. When the regulator is not used (low voltage operation), pin 12 must be connected to VEEO (pin 13). OPERATING NOTES - REFER TO FIGS. 3 AND 4 Gyrator C1 (Pin 3) If the environment in which the device is operating limits the background light such that the DC compo- nent of the diode current has a maximum of 200 µA, it may be desirable to omit (as in Fig. 3) the more bulky and costly 68 µF capacitor (gyrator C1 shown in Fig. 4). In this case pin 3 can be left open circuit. The resultant application will then have a characteristic of greatly reduced gain when the ambient light causes the DC current to rise above this threshold. Alternatively,the 68 µF capacitor can be replaced by a resistor. The outcome of this is to further reduce the gain in ambient light levels above the 200 µA threshold. Below this threshold the overall gain is slightly enhanced as the light level ap- proaches the threshold value. If chosen, this resistance should lie between 10k Ω and 200kΩ . Noise Immunity The stretch output can also be used as a means of improving performance relating to a receiver sys- tem, over and above its main purpose of providing a micro- processor interface. Including C8 (Fig. 4) causes the output pulses (from pin 9) to be subjected to the stretch input threshold. Thus any noise pulses from pin 9 that are below this threshold will not be seen at the stretch output (pin 11). A further improvement can be made, using this stretch input threshold, by including some additional filtering of the output (C10 in Fig. 4). This can be adjusted in value (typically 100pF) to reduce some of the noise pulses that otherwise cross the threshold, to a level below the threshold. Screening Use of screening for the device, and associated components, improves the performance and immunity to externally radiated noise. The screening method used must protect the sensitive front-end of the device; provided that the diode, pin 1-pin 16, C2 (pin 2) and the first stage decoupling (pin 15) are screened, it may be found that for the application considered, the remalning circuitry need not be so protected. In applications where externally radiated noise is minimal, it may be possible to reduce any screening to pins 1 and 16 and the diode connections only. Screening may not be necessary in some instances, but this largely depends on the level of radiated noise, the decoupling/filtering employed and the receiver’s decoding technique. Decoupling Typical decoupling arrangements for use with or without the regulator are given in Figs. 4 and 3, respectively. When using the regulator, further improvements in high frequency supply rejection are possible by the inclusion of R2. The value can be chosen so as to keep the pin 12 end of R2 within the 29·0 to 218V (wrt pin 7) specified voltage range. For example, if the SL486 is used in a system with a supply of 16V, a typical value tor R2 would be 200 Ω. Note that the regulator is a low impedance point between pins 12 and 13. C7 thus maintains a low impedance path between pins 4 and 12 at high frequencies. APPLICATION NOTES - REFER TO FIG. 4 Diode Anode and Cathode (Pins 1 and 16) The infra-red receiving diode is connected between pins 1 and 16. The input circuit is configured so as to reject signals common to both pins. This improves the stability of the device, and greatly reduces the sensitivity to radiated electrical noise, The diode is reverse biased by a nominal 0·65V Gyrator C2 and C1 (Pins 2 and 3) The decoupling, provided by gyrator C2 and C1, rolls off the gain of the feedback loop which balances the DC component of the infra-red diode current. The values of C2 and C1 are chosen to produce a low frequency cut-off characteristic below a nominal 2kHz. Hence, the gyrator produces approximately 20dB rejection at 100Hz. The gyrator consists of two feedback loops operating in tandem. Only one feedback path is functional when the DC component of the diode current is less than 200 µA. This loop is decoupled by gyrator C2. For diode currents between 200 µA and 1·5mA the second control loop is operative, and this is decoupled by gyrator C1. The decoupling capacitors, gyrator C2 and C1, must be connected between pins 2 and 3, to pin 4. The series imped- ance of C2 and C1 should be kept to a minimum. First Stage Decouple (Pin 15) The capacitor on pin 15 decouples the signal from the non-inverting input of the first difference amplifier (see also Fig. 2). The capacitance of 15nF is chosen to produce a 2kHz low frequency roll-off. The capacitor must be connected between pins 15 and 14 (the input ground). Second Stage Decouple (Pin 5) The capacitor on pin 5 decouples the signal from the non-inverting input of the second difference amplifier. The capacifance of 33nF is chosen to produce a 2kHz low frequency roll-off. The capaci- tor must be connected between pins 5 and 4 (the input VCC). Fourth Stage Decouple (Pin 6) The capacitor on pin 6 decouples the signal from the non-inverting input of the fourth difference amplifier. The capacitance of 4.7nF is chosen to produce a 2kHz low frequency roll-off. The capacitor must be connected between pins 6 and 7 (the output VCC). AGC Decouple/Delay Adjust (Pin 8) The output of the fourth difference amplifier is followed by a peak detector, which is used to provide an AGC control level. This produces a current source which is limited to 10mA at pin 8. The AGC decoupling capacitor (C5 normally 150nF) filters the pulsed input, and the resultant level controls the gain of the first three difference amplifiers. The AGC control level exhibits a fast attack/slow decay characteristic. Immediately infra-red pulses are detected, the gain will be reduced, so that any weaker noise pulses that are also received will not be seen at the output. Thus, provided the infra-red pulses are the most intense, it is possible to receive data in noisy environments. The slow decay keeps the AGC level intact during data reception, and produces a delay before any received noise may become present at the output, when transmission ceases. Output (Pin 9) The output will be low, pulsing high with a source impedance of a nominal 55k Ω , for a received infra- red pulse. It is a linear amplification of the input and swings between output ground and output VCC. Stretch Input and Stretch Output (Pins 10 and 11) A typical infra-red PPM system transmits very narrow pulses. The duration of these pulses is typically 15 µs, so in order to use a microprocessor-based decoder system it is necessary to lengthen the received pulse. This stretched output can be obtained from pin 11 when a capacitor is connected between pins 9 and 10 (C8 in Fig. 4). The width of the pulse is determined by the value of this coupling capacitor and is defined in the Electrical Character- istics. The stretch output is normally high, pulsing low for a received infra-red pulse and swings between VCCO and VEEO. It must be noted that the stretch output logic sense is |
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类似说明 - SL486NAMP |
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