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SN74CB3Q3125PWE4 数据表(PDF) 11 Page - Texas Instruments

部件名 SN74CB3Q3125PWE4
功能描述  Quadruple FET Bus Switch
Download  26 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

SN74CB3Q3125PWE4 数据表(HTML) 11 Page - Texas Instruments

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0
1
2
3
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5
0
200
400
600
800
1000
1200
Time (ps)
Vin
Vout
C001
SN74CB3Q3125
www.ti.com
SCDS143C – OCTOBER 2003 – REVISED JUNE 2015
Typical Application (continued)
9.2.2 Detailed Design Procedure
1. Recommended input conditions:
For specified high and low levels, see VIH and VIL in Recommended Operating Conditions
Inputs and outputs are overvoltage tolerant, which slows them to go as high as 5.5 V at any valid VCC
2. Recommended output conditions:
Load currents must not exceed ±64 mA per channel
3. Frequency selection criterion:
Added trace resistance or capacitance can reduce maximum frequency capability; use layout practices as
directed in Layout
9.2.3 Application Curve
Figure 6. Propagation Delay (tpd) Simulation Result at VCC = 3.3 V
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating listed in the
Absolute Maximum Ratings table.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-
μF bypass capacitor is recommended. If multiple pins are labeled VCC, then a 0.01-μF or 0.022-μF
capacitor is recommended for each VCC because the VCC pins are tied together internally. For devices with dual-
supply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass capacitor is recommended
for each supply pin. To reject different frequencies of noise, use multiple bypass capacitors in parallel. Capacitors
with values of 0.1
μF and 1 μF are commonly used in parallel. The bypass capacitor must be installed as close to
the power terminal as possible for best results.
Copyright © 2003–2015, Texas Instruments Incorporated
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