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ADC0844CCN 数据表(PDF) 11 Page - National Semiconductor (TI) |
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ADC0844CCN 数据表(HTML) 11 Page - National Semiconductor (TI) |
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11 / 20 page  Applications Information (Continued) TABLE 2. ADC0848 MUX Addressing MUX Address CS WR RD Channel MUX MA4 MA3 MA2 MA1 MA0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 AGND Mode X LLLL L H + − X LLL H L H − + X L LHL L H + − XL L H H L L H − + Differential X LHL L L H + − X LHLH L H − + XL H H L L H + − X L HHH L H − + L H LLL L H + − LHL LH L H + − LHLHL L H + − LHLH H L L H + − Single-Ended LH HL L L H + − LH HLH L H + − L HHH L L H + − L HHHH L H + − H H LLL L H + − HH L L H L H + − H HLHL L H + − Pseudo- H HLH H L L H + − Differential HHH L L L H + − H H HLH L H + − HHHH L L H + − XXXXX L L L Previous Channel Configuration 3.2 Input Current Due to the sampling nature of the analog inputs, short dura- tion spikes of current enter the “+” input and exit the “−” input at the clock edges during the actual conversion. These cur- rents decay rapidly and do not cause errors as the internal comparator is strobed at the end of a clock period. Bypass capacitors at the inputs will average these currents and cause an effective DC current to flow through the output re- sistance of the analog signal source. Bypass capacitors should not be used if the source resistance is greater than 1k Ω. 3.3 Input Source Resistance The limitation of the input source resistance due to the DC leakage currents of the input multiplexer is important. A worst-case leakage current of ± 1 µA over temperature will createa1mV input error witha1k Ω source resistance. An op amp RC active low pass filter can provide both imped- ance buffering and noise filtering should a high impedance signal source be required. 4.0 OPTIONAL ADJUSTMENTS 4.1 Zero Error The zero of the A/D does not require adjustment. If the mini- mum analog input voltage value, V IN(MIN), is not ground, a zero offset can be done. The converter can be made to out- put 0000 0000 digital code for this minimum input voltage by biasing any V IN (−) input at this VIN(MIN) value. This is useful for either differential or pseudo-differential modes of input channel configuration. The zero error of the A/D converter relates to the location of the first riser of the transfer function and can be measured by grounding the V − input and applying a small magnitude posi- tive voltage to the V + input. Zero error is the difference be- tween actual DC input voltage which is necessary to just cause an output digital code transition from 0000 0000 to 0000 0001 and the ideal 1⁄2 LSB value (1⁄2 LSB=9.8 mV for V REF=5.000 VDC). 4.2 Full-Scale The full-scale adjustment can be made by applying a differ- ential input voltage which is 1 1⁄2 LSB down from the desired analog full-scale voltage range and then adjusting the mag- nitude of the V REF input for a digital output code changing from 1111 1110 to 1111 1111. 4.3 Adjusting for an Arbitrary Analog Input Voltage Range If the analog zero voltage of the A/D is shifted away from ground (for example, to accommodate an analog input signal which does not go to ground), this new zero reference should be properly adjusted first. A V IN (+) voltage which equals this desired zero reference plus 1⁄2 LSB (where the www.national.com 11 |
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类似说明 - ADC0844CCN |
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