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TS33003-M018QFNR 数据表(PDF) 7 Page - Semtech Corporation |
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TS33003-M018QFNR 数据表(HTML) 7 Page - Semtech Corporation |
7 / 16 page TS33001/2/3 Final Datasheet Rev 1.6 January 15, 2016 www.semtech.com 7 of 16 Semtech Proprietary & Confidential Functional Description This voltage-mode Point of Load (POL) synchronous step- down power supply product can be used in the consumer, industrial, and automotive market segments. It includes flexibility to be used for a wide range of output voltages and is optimized for high efficiency power conversion with low RDSON integrated synchronous switches. A 5MHz internal switching frequency facilitates low cost LC filter combinations and improved transient response. Additionally, the fixed output version, with integrated Power on Reset and Fault circuitry enables a minimal external component count to provide a complete power supply solution for a variety of applications. Detailed Pin Description Unregulated input, VCC This terminal is the unregulated input voltage source for the IC. It is recommended that a 22uF bypass capacitor be placed close as possible to the VCC pins for best performance. Since this is the main supply for the IC, good layout practices need to be followed for this connection. Feedback, FB This is the voltage feedback input terminal for the adjustable version. For the fixed mode versions, this pin should be left floating and not connected. The connection on the PCB should be kept as short as Switching output, VSW This is the switching node of the regulator. It should be connected directly to the 1uH inductor with a wide, short trace. It is switching between VCC and PGND at the switching frequency. Ground, GND This ground is used for the majority of the device including the analog reference, control loop, and other circuits. Power Ground, PGND This is a separate ground connection used for the low side synchronous FET to isolate switching noise from the rest of the device. Enable, EN This is an input terminal to activate the entire device. This will enable the internal reference, oscillator, TSD, etc, and allow the fault detection circuitry to work correctly. Notice that the EN needs to low for the part to exhibit less than 200nA quiescent current. The input threshold is TTL/CMOS compatible. Power Good Output, PG This is an open drain, active high output. The switched mode output voltage is monitored and the PG line will remain possible from the feedback resistors, kept away from the VSW low until the output voltage reaches the V OUT-UV threshold, connections or other switching/high frequency nodes, and should not be shared with any other connection. This should minimize stray coupling, reduce noise injection, and minimize voltage shift cause by output load. To choose the resistors for the adjustable version, use the following equation: V OUT = 0.6 (1 + R TOP /R BOT ) For stability, RTOP should be 270K Ohms to 330K Ohms. Output Voltage Sense, V OUT Sense This is the input terminal for the voltage output feedback and is needed for both adjustable and fixed voltage versions. This should be connected to the main output capacitor, and the same good layout practices should be followed as for the FB connection. Keep this line as short as possible, keep it away from the VSW and other switching or high frequency traces, and do not share this connection with any other connection on the PCB. approximately 85% of the final regulation output. Once the internal comparator detects the output voltage is above the desired threshold, an internal 10mSec delay timer is activated and the PG line is de-asserted to high when this delay timer expires. In the event the output voltage decreases below V OUT- UV , the PG line will be asserted low immediately and remain low until the output rises above V OUT-UV and the delay timer times out again. If EN is pulled low, the VCC input undervoltage trips, or Thermal Shutdown is reached, the PG pin will immediately be pulled low. nLow Power Mode Output, nLP This is an input to force the PWM mode when light load is on the output. The PFM low power mode has higher output voltage ripple, which is some applications may be unacceptable. If low ripple is needed on the output this pin can be tied to VCC input, or switched above 2.2V during operation to force the device into normal PWM mode. |
类似零件编号 - TS33003-M018QFNR |
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类似说明 - TS33003-M018QFNR |
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