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TPIC2050RDFDRG4 数据表(PDF) 10 Page - Texas Instruments |
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TPIC2050RDFDRG4 数据表(HTML) 10 Page - Texas Instruments |
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10 / 68 page  TPIC2050 SLIS167 – AUGUST 2015 www.ti.com Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VLDD = 0x7FF, LDD_IUP = 00 102 120 138 VLDD = 0, LDD_IUP = 00 –10 0 10 LDD current gain by IUP setting AV(2)(3) (digital mode only) VLDD = 0x7FF, LDD_IUP = 01 119 149 178 mA LDD_MSEL: 01(CD), 10(DVD) VLDD = 0x7FF, LDD_IUP = 10 141 177 212 VLDD = 0x7FF, LDD_IUP = 11 164 206 247 VLDD = 0x7FF, LDD_IUP = 00 102 120 138 LDD current gain by IUP setting VLDD = 0, LDD_IUP = 00 –10 0 10 (digital mode only) AV(2)(3) VLDD = 0x7FF, LDD_IUP = 01 119 149 178 mA LDD_MSEL:11(BD) at A9P5V = VLDD = 0x7FF, LDD_IUP = 10 141 177 212 8.55 to 10.45 V VLDD = 0x7FF, LDD_IUP = 011 164 206 247 VLDD = 0x7FF, LDD_IUP = 00 98 120 141 LDD current gain by IUP setting VLDD = 0, LDD_IUP = 00 –10 0 10 (digital mode only) AV(2)(3) VLDD = 0x7FF, LDD_IUP = 01 114 149 183 mA LDD_MSEL:11(BD) at A9P5V = VLDD = 0x7FF, LDD_IUP = 10 136 177 217 7.65 to 8.55 V VLDD = 0x7FF, LDD_IUP = 11 158 206 253 ResLDD LDD current gain P5V = 4.5 V to 5.5 V, A9P5V = 9.5 V 11 bit P5V = 5 V VLDDIN = 0 → 0x7FF tr Rise time of ILDD 162 203 243 120 mA µs P5V = 5 V VLDDIN = 0x7FF → 0 tf Fall time of ILDD 162 203 243 50 mA IZ VLDDIN input impedance 100 200 300 k Ω LDDdbA 140 200 260 mV Low voltage dead band LDDdbA 0x3F bit THERMOMETER PART ResTEMP Resolution 6 bit CHIPTEMP[5:0] = 00 8 15 22 Trng Temperature range °C CHIPTEMP[5:0] = 3Fh 155 165 175 FTEMP Update cycle 10 kHz ACTUATOR PROTECTION tintACTTEMP Update cycle 26 ms SERIAL PORT VOLTAGE LEVELS SOMI High-level output voltage, VOH IOH = 1 mA 80% SIOV V SOMI Low-level output voltage, VOL IOL = 1 mA 20% SIOV V SIMO High-level input voltage, VIH 70% SIOV V SIMO Low-level input voltage, VIL 20% SIOV V tSIMO Input rise/fall time 20% ⇔ 80% SIOV 3.5 ns tSOMI Output rise/fall time(4) Cload = 30 pF, 20% ⇔ 80% SIOV 10 ns RSCLK Internal pulldown resistance 100 200 300 k Ω RSSZ Internal pullup resistance 100 200 300 k Ω (3) LDD_IUP settings are only for digital mode. (4) Specified by design 10 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPIC2050 |
类似零件编号 - TPIC2050RDFDRG4 |
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类似说明 - TPIC2050RDFDRG4 |
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