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74F379PC 数据表(PDF) 2 Page - National Semiconductor (TI) |
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74F379PC 数据表(HTML) 2 Page - National Semiconductor (TI) |
2 / 8 page Unit LoadingFan Out 54F74F Pin Names Description UL Input IIH IIL HIGHLOW Output IOH IOL E Enable Input (Active LOW) 1010 20 mA b06 mA D0–D3 Data Inputs 1010 20 mA b06 mA CP Clock Pulse Input (Active Rising Edge) 1010 20 mA b06 mA Q0–Q3 Flip-Flop Outputs 50333 b 1 mA20 mA Q0–Q3 Complement Outputs 50333 b 1 mA20 mA Functional Description The ’F379 consists of four edge-triggered D-Type flip-flops with individual D inputs and Q and Q outputs The Clock (CP) and Enable (E) inputs are common to all flip-flops When the E is input HIGH the register will retain the present data independent of the CP input The Dn and E inputs can change when the clock is in either state provided that the recommended setup and hold times are observed Truth Table Inputs Outputs E CP Dn Qn Qn H L XNC NC L L HH L L L LL H H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW-to-HIGH Transition NC e No Change Logic Diagram TLF9527 – 4 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 2 |
类似零件编号 - 74F379PC |
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类似说明 - 74F379PC |
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