CDCLVP111VFR datasheet(11/29 Pages) TI1

部件名	CDCLVP111VFR

功能描述	Low-Voltage 1:10 LVPECL With Selectable Input Clock Driver

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制造商	TI1 [Texas Instruments]

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CDCLVP111

www.ti.com

SCAS859F – JANUARY 2009 – REVISED JUNE 2015

8 Detailed Description

8.1 Overview

The CDCLVP111 is an open emitter for LVPECL outputs. Therefore, proper biasing and termination are required

to ensure correct operation of the device and to minimize signal integrity. The proper termination for LVPECL

outputs is a 50

Ω to (VCC –2) V, but this DC voltage is not readily available on PCB. Therefore, a Thevenin

equivalent circuit is worked out for the LVPECL termination in both direct-coupled (DC) and AC-coupled

configurations. These configurations are shown in Figure 8 (a and b) for VCC = 2.5 V and Figure 9 (a and b) for

VCC = 3.3 V, respectively. TI recommends to place all resistive components close to either the driver end or the

receiver end. If the supply voltage for the driver and receiver is different, AC coupling is required.

8.2 Functional Block Diagram

8.3 Feature Description

The CDCLVP111 is a low-additive jitter universal to LVPECL fan out buffer with 2 selectable inputs. The small

package, low-output skew, and low-additive jitter make for a flexible device in demanding applications.

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Product Folder Links: CDCLVP111

类似零件编号 - CDCLVP111VFR

制造商	部件名	数据表	功能描述
Texas Instruments	CDCLVP111VFR	619Kb / 15P	[Old version datasheet] LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER

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类似说明 - CDCLVP111VFR

制造商	部件名	数据表	功能描述
Texas Instruments	CDCLVP111-EP	743Kb / 15P	[Old version datasheet] LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER
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ON Semiconductor	MC100LVEP111	131Kb / 8P	Low-Voltage 1:10 Differential LVECL/LVPECL/LVEPECL/HSTL Clock Driver December, 2008 ??Rev. 17
Cypress Semiconductor	CY2DL15110	430Kb / 13P	1:10 Differential LVDS Fanout Buffer with Selectable Clock Input