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SI52143 数据表(PDF) 9 Page - Silicon Laboratories |
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SI52143 数据表(HTML) 9 Page - Silicon Laboratories |
9 / 21 page Si52143 Rev 1.3 9 3. Test and Measurement Setup Figure 3 shows the test load configuration for HCSL clock outputs. Figure 3. 0.7 V Differential Load Configuration Please reference application note AN781 recommendations on how to terminate the differential outputs for LVDS, LVPECL, or CML signalling levels. Figure 4. Differential Output Measurement for Differential Signals (for AC Parameters Measurement) M eas ur em en t Po in t 2p F 50 M e as ur e m en t Po in t 2p F 50 L1 L1 = 5 " OU T + OU T - L1 |
类似零件编号 - SI52143 |
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类似说明 - SI52143 |
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