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MMSF10N02Z 数据表(PDF) 6 Page - ON Semiconductor |
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MMSF10N02Z 数据表(HTML) 6 Page - ON Semiconductor |
6 / 10 page MMSF10N02Z http://onsemi.com 6 t, TIME Figure 11. Reverse Recovery Time (trr) di/dt = 300 A/ μs Standard Cell Density High Cell Density tb trr ta trr SAFE OPERATING AREA The Forward Biased Safe Operating Area curves define the maximum simultaneous drain−to−source voltage and drain current that a transistor can handle safely when it is forward biased. Curves are based upon maximum peak junction temperature and a case temperature (TC) of 25°C. Peak repetitive pulsed power limits are determined by using the thermal response data in conjunction with the procedures discussed in AN569, “Transient Thermal Resistance − General Data and Its Use.” Switching between the off−state and the on−state may traverse any load line provided neither rated peak current (IDM) nor rated voltage (VDSS) is exceeded, and that the transition time (tr, tf) does not exceed 10 μs. In addition the total power averaged over a complete switching cycle must not exceed (TJ(MAX) − TC)/(RθJC). A power MOSFET designated E−FET can be safely used in switching circuits with unclamped inductive loads. For reliable operation, the stored energy from circuit inductance dissipated in the transistor while in avalanche must be less than the rated limit and must be adjusted for operating conditions differing from those specified. Although industry practice is to rate in terms of energy, avalanche energy capability is not a constant. The energy rating decreases non−linearly with an increase of peak current in avalanche and peak junction temperature. Figure 12. Maximum Rated Forward Biased Safe Operating Area 0.1 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1 10 VGS = 11 V SINGLE PULSE TC = 25°C 10 0.1 10 ms 1 100 100 1 ms dc RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT |
类似零件编号 - MMSF10N02Z |
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类似说明 - MMSF10N02Z |
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