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MTV10N100E 数据表(PDF) 6 Page - ON Semiconductor

部件名 MTV10N100E
功能描述  Power Field Effect Transistor
Download  11 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MTV10N100E 数据表(HTML) 6 Page - ON Semiconductor

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VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
Figure 10. Stored Charge
TJ = 25°C
VGS = 0 V
0
8
10
6
4
2
Figure 11. Diode Forward Voltage versus Curre
0.74
0.82
0.66
0.5
0.58
04
8
IS = 10 A
dlS/dt = 100 A/
μs
VDD = 25 V
TJ = 25°C
4
ID, DRAIN CURRENT (AMPS)
2
26
6
0
10
1000
100
10
010
1
14
12
10
8
6
4
2
0
0
10
20
30
40
50
60
70
80
90
100
Qg, TOTAL GATE CHARGE (nC)
Q2
Q3
560
480
400
320
240
160
80
0
RG, GATE RESISTANCE (OHMS)
Q1
QT
TJ = 25°C
ID = 10 A
VDD = 480 V
ID = 10 A
VGS = 10 V
TJ = 25°C
td(on)
td(off)
VGS
VDS
tf
tr
8
10
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the
procedures discussed in AN569, “Transient Thermal
Resistance−General Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 μs. In addition the
total power averaged over a complete switching cycle must
not exceed (TJ(MAX) − TC)/(RθJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with
an increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry custom.
The energy rating must be derated for temperature as
shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.


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