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LM22677 数据表(PDF) 10 Page - Texas Instruments |
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LM22677 数据表(HTML) 10 Page - Texas Instruments |
10 / 28 page LM22677, LM22677-Q1 SNVS582O – SEPTEMBER 2008 – REVISED AUGUST 2015 www.ti.com Feature Description (continued) threshold of about 0.8 V. With the RT/SYNC pin open, the voltage floats above this threshold, and the mode is set to run with the internal clock. With a frequency set resistor present, an internal reference holds the pin voltage at 0.8 V; the resulting current sets the mode to allow the resistor to control the clock frequency. If the external circuit forces the RT/SYNC pin to a voltage much greater or less than 0.8 V, the mode is set to allow external synchronization. The mode is latched until either the EN or the input supply is cycled. The choice of switching frequency is governed by several considerations. As an example, lower frequencies may be desirable to reduce switching losses or improve duty cycle limits. Higher frequencies, or a specific frequency, may be desirable to avoid problems with EMI or reduce the physical size of external components. The flexibility of increasing the switching frequency above 500 kHz can also be used to operate outside a critical signal frequency band for a given application. Keep in mind that the values of inductor and output capacitor cannot be reduced dramatically, by operating above 500 kHz. This is true because the design of the internal loop compensation restricts the range of these components. Frequency synchronization requires some care. First the external clock frequency must be greater than the internal clock frequency, and less than 1 MHz. The maximum internal switching frequency is specified in the Electrical Characteristics table. NOTE The frequency adjust feature and the synchronization feature can not be used simultaneously. The synchronizing frequency must always be greater than the internal clock frequency. Secondly, the RT/SYNC pin must see a valid high or low voltage, during start-up, in order for the regulator to go into the synchronizing mode (see above). Also, the amplitude of the synchronizing pulses must comport with VSYNC levels found in the Electrical Characteristics table. The regulator will synchronize on the rising edge of the external clock. If the external clock is lost during normal operation, the regulator will revert to the 500 kHz (typical) internal clock. If the frequency synchronization feature is used, current limit foldback is not operational (see the Current Limit section for details). Figure 12. Switching Frequency vs RT/SYNC Resistor 10 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LM22677 LM22677-Q1 |
类似零件编号 - LM22677 |
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类似说明 - LM22677 |
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