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TEA1833LTS 数据表(PDF) 9 Page - NXP Semiconductors |
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TEA1833LTS 数据表(HTML) 9 Page - NXP Semiconductors |
9 / 24 page TEA1833LTS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 — 31 August 2015 9 of 24 NXP Semiconductors TEA1833LTS GreenChip SMPS control IC Leading-edge blanking prevents false triggering due to capacitive discharge when switching on the external power switch (see Figure 9). 7.9 Overvoltage protection (pin ISENSE) Accurate overvoltage protection can be realized at the ISENSE pin by sensing the auxiliary voltage. During the primary stroke, diode D4 (see Figure 3) is blocked so that the converter still works under current mode control. During the secondary stroke, the ISENSE voltage represents the output voltage via the resistor divider R5 and R3 (see Figure 3). The ISENSE voltage is sampled 2 s after the gate signal drops to avoid the ringing of the transformer. If the sampled voltage exceeds Vovp(ISENSE) for four consecutive switching cycles, the IC triggers the latched protection. 7.10 Overvoltage protection (pin VCC) An OverVoltage Protection (OVP) circuit is connected to the VCC pin. When the VCC exceeds Vth(OVP) (36 V typical) for four consecutive switching cycles, the IC triggers the latched protection. When VCC drops below Vth(OVP) before count = 4 is reached, the counter is reset to zero. 7.11 Output Short Circuit Protection (OSCP) A flyback controller operating in CCM at a fixed frequency turns on the primary MOSFET after a predefined period (see Figure 10). The minimum on-time equals the blanking time. If after the blanking time the measured peak current (VISENSE) is higher than the Ipeak regulation level, the driver is switched off. Fig 8. Peak current control Fig 9. Leading-edge blanking tleb Vsense(max) VISENSE t 014aaa932 |
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