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SM5953 数据表(PDF) 11 Page - SyncMOS Technologies,Inc |
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SM5953 数据表(HTML) 11 Page - SyncMOS Technologies,Inc |
11 / 43 page SM5953 8-Bit Micro-controller 15KB with ISP Flash & 256B RAM embedded Specifications subject to change without notice contact your sales representatives for the most recent information. ISSFD-M074 Ver D SM5953 04/16/2015 - 10 - Function Description 1. General Features SM5953 is an 8-bit micro-controller. All of its functions and the detailed meanings of SFR will be given in the following sections. 1.1 Embedded Flash The program can be loaded into the embedded 15KB Flash memory via its writer or In-System Programming (ISP). The high-quality Flash suitable for re-programming and data recording as EEPROM. 1.2 IO Pads The SM5953 has Five I/O ports: Port 0, Port 1, Port 2, Port 3. Port 0~Port 3 are 8-bit ports. These are: quasi- bidirectional (standard 8051 port outputs) with Port 1~3, and open drain with Port 0. All the pads are with slew rate to reduce EMI. The IO pads can withstand ESD in human body mode guaranteeing the SM5953’s quality in high electro-static environments. 1.3 System Control Register (SCONF) Mnemonic: SCONF Address: BFh 7 6 5 4 3 2 1 0 Reset WDR - - - - ISPE - ALEI 00H WDR Watch Dog Timer Reset. When system reset by Watch Dog Timer overflow, WDR will be set to 1. User should check WDR bit whenever un-predicted reset happened. ISPE ISP function enable bit. When Enable the ISP function, ISPE will be set to 1. ALEI ALE output inhibit bit. When default, It can inhibit the clock signal in (Fosc/6) Hz output to the ALE pin. When set to 1, the ALE pin output will stop to reduce EMI. |
类似零件编号 - SM5953 |
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类似说明 - SM5953 |
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