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TC1321EOA 数据表(PDF) 4 Page - Microchip Technology |
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TC1321EOA 数据表(HTML) 4 Page - Microchip Technology |
4 / 16 page TC1321 DS21387B-page 4 © 2002 Microchip Technology Inc. Serial Port AC Timing fSMB SMBus Clock Frequency 10 — 100 kHz tIDLE BusFreeTimePrior to New Transition 4.7 — — µsec tH(START) START Condition Hold Time 4.0 — — µsec tSU(START) START Condition Setup Time 4.7 — — µsec 90% SCLto10% SDA (for Repeated START Condition) tSU(STOP) STOP Condition Setup Time 4.0 — — µsec tH-DATA Data In Hold Time 100 — — nsec tSU-DATA Data In Setup Time 100 — — nsec tLOW Low Clock Period 4.7 — — µsec 10% to 10% tHIGH High Clock Period 4 — — µsec 90% to 90% tF SMBus Fall Time — — 300 nsec 90% to 10% tR SMBus Rise Time — — 1000 nsec 10% to 90% tPOR Power-on Reset Delay — 500 — µsec VDD ≥ VPOR (Rising Edge) TC1321 ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: VDD = 2.7V to 5.5V, -40°C ≤ TA ≤ +85°C, VREF = 1.2 unless otherwise noted. Symbol Parameter Min Typ Max Unit Test Conditions Note 1: SDA and SCL must be connected to VDD or GND. 2: Measured at VOUT ≥ 50mV referred to GND to avoid output buffer clipping. |
类似零件编号 - TC1321EOA |
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类似说明 - TC1321EOA |
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