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LF3370QC12 数据表(PDF) 6 Page - LOGIC Devices Incorporated

部件名 LF3370QC12
功能描述  High-Definition Video Format Converter
Download  24 Pages
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制造商  LODEV [LOGIC Devices Incorporated]
网页  http://www.logicdevices.com
标志 LODEV - LOGIC Devices Incorporated

LF3370QC12 数据表(HTML) 6 Page - LOGIC Devices Incorporated

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LF3370
High-Definition Video Format Converter
6
03/13/2001–LDS.3370-F
Video Imaging Products
DEVICES INCORPORATED
LF3370’s core. Data may be presented on
input ports A12-0, B12-0, and C12-0 as three
channels of non-interleaved input data, one
channel non-interleaved and one channel
interleaved input data, or one channel of
interleaveddata(seeTable1forvarious
videoinputschemes). D12-0 istheKey
channel input port; the Key channel is
simply passed through the input
demultiplexerwithalatencythatmatches
the other three channels.
If video data is non-interleaved and
presented to input ports A12-0, B12-0, and
C12-0, no demultiplexing is performed.
The three channels are passed unmodified
into the LF3370 core with a delay of 3 CLK
cycles. For this operation, bits 0 and 1
must both be set to 1 in Configuration
Register 0 (see Table 5).
If video data is on two channels (see Figure
4), one channel of non-interleaved video
and one channel of interleaved video, it is
assumedthatnon-interleavedvideois
presented to input port A12-0 (i.e., Luma)
FIGURE 4. INPUT PROCESSING 4:2:2:4 (INTERLEAVED CHROMA ON CHANNEL B)
CLK
1
2
3
Demultiplexed Input Data (Output of Demux Section)
A12-0
5
6
7
8
10
13
Y0
Y1
Y2
Y3
Y4
Y5
Y6
911
SYNC
Y7
Y8
Y9
A'12-0**
C'12-0**
D'12-0**
B'12-0**
412
14
D12-0
Y10
Y11
Y12
17
15
16
*
B12-0
CB0
CR0
CB2
CR2
CB4
CR4
CB6
CR6
CB8
CR8
CB10
CR10
CB12
K0
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
K12
CR'0
CR'2
CR'4
CR'6
CB'0
CB'2
CB'4
CB'6
Y'0
Y'1
Y'2
Y'3
Y'4
Y'5
Y'6
Y'7
Y'8
K'0
K'1
K'2
K'3
K'4
K'5
K'6
K'7
K'8
CR'6
CB'6
RESET
FIGURE 5. INPUT PROCESSING 4:2:2:4 (INTERLEAVED LUMA/CHROMA ON CHANNEL A)
CLK
RESET
1
2
3
Core Clock (Internally Generated and Synchronized to CLK by RESET) Used Only When Single Channel Interleaved Input or Output Video is Used.
Demultiplexed Input Data (Output of Demux Section)
A12-0
5
6
7
8
10
13
CB0
Y0
CR0
Y1
CB2
Y2
CR2
911
CLK/2*
SYNC
Y3
CB4
Y4
A’12-0**
C’12-0**
CR’0
D’12-0**
B’12-0**
CB’0
412
14
D12-0
K0
K1
K2
K3
K4
Y’0
Y’1
Y’2
K’0
K’1
K’2
CR’1
CB’1
K5
Y’3
K’3
CR4
Y5
CB6
17
15
16
18
*
**


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